diff options
| author | Jon French | 2019-05-13 16:31:10 +0100 |
|---|---|---|
| committer | Jon French | 2019-05-13 16:31:10 +0100 |
| commit | 8b6da5847491d48e36f87e31a86a41aa1656cb62 (patch) | |
| tree | 1d4fea6e75e82c1754202219fc34422cbb34c7cd /aarch64_small/armV8_A64_sys_regs.sail | |
| parent | 5d31e7a0ed9d2f2ea23eca1a5aed80d06ab4c0ea (diff) | |
aarch64_small: extern-ify and implement TMCommitEffect and SCTLR converter
Diffstat (limited to 'aarch64_small/armV8_A64_sys_regs.sail')
| -rw-r--r-- | aarch64_small/armV8_A64_sys_regs.sail | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/aarch64_small/armV8_A64_sys_regs.sail b/aarch64_small/armV8_A64_sys_regs.sail index 36f7c3f6..20aa4a5c 100644 --- a/aarch64_small/armV8_A64_sys_regs.sail +++ b/aarch64_small/armV8_A64_sys_regs.sail @@ -176,8 +176,7 @@ register SCTLR_EL3 : SCTLR_type /* System Control Register (EL3) */ /* CP: added coercion from SCTLR_EL1_type to SCTLR_type for the SCTLR function */ -val cast SCTLR_EL1_type_to_SCTLR_type : SCTLR_EL1_type -> SCTLR_type - +val cast "SCTLR_EL1_type_to_SCTLR_type" : SCTLR_EL1_type -> SCTLR_type bitfield TCR_EL1_type : bits(64) = { |