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| author | Jon French | 2019-04-15 16:18:18 +0100 |
|---|---|---|
| committer | Jon French | 2019-04-15 16:18:18 +0100 |
| commit | a9f0b829507e9882efdb59cce4d83ea7e87f5f71 (patch) | |
| tree | 11cde6c1918bc15f4dda9a8e40afd4a1fe912a0a /aarch64/aarch64_extras.lem | |
| parent | 0f6fd188ca232cb539592801fcbb873d59611d81 (diff) | |
| parent | 57443173923e87f33713c99dbab9eba7e3db0660 (diff) | |
Merge branch 'sail2' into rmem_interpreter
Diffstat (limited to 'aarch64/aarch64_extras.lem')
| -rw-r--r-- | aarch64/aarch64_extras.lem | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/aarch64/aarch64_extras.lem b/aarch64/aarch64_extras.lem index d22ece00..b662e230 100644 --- a/aarch64/aarch64_extras.lem +++ b/aarch64/aarch64_extras.lem @@ -78,7 +78,7 @@ val write_ram : forall 'rv 'e. integer -> integer -> list bitU -> list bitU -> list bitU -> monad 'rv unit 'e let write_ram addrsize size hexRAM address value = write_mem_ea Write_plain address size >> - write_mem_val value >>= fun _ -> + write_mem Write_plain address size value >>= fun _ -> return () val read_ram : forall 'rv 'e. |