diff options
| author | Robert Norton | 2016-01-20 14:06:22 +0000 |
|---|---|---|
| committer | Robert Norton | 2016-01-21 10:50:46 +0000 |
| commit | 7d97452b129036126a8738ebff2a9300a25707c8 (patch) | |
| tree | d18f35f35976a13de1f7574f59b785ddf516242a | |
| parent | cc295141edaf8f337471b4432755222145240b6b (diff) | |
mips: rename GPRs so that they sort lexicographically for display.
| -rw-r--r-- | mips/mips.sail | 22 | ||||
| -rw-r--r-- | src/lem_interp/run_with_elf.ml | 20 |
2 files changed, 21 insertions, 21 deletions
diff --git a/mips/mips.sail b/mips/mips.sail index dd0b9c28..d0c2b385 100644 --- a/mips/mips.sail +++ b/mips/mips.sail @@ -47,16 +47,16 @@ register (bit[64]) delayedPC (* General purpose registers *) -register (bit[64]) GPR0 (* should never be read or written *) -register (bit[64]) GPR1 -register (bit[64]) GPR2 -register (bit[64]) GPR3 -register (bit[64]) GPR4 -register (bit[64]) GPR5 -register (bit[64]) GPR6 -register (bit[64]) GPR7 -register (bit[64]) GPR8 -register (bit[64]) GPR9 +register (bit[64]) GPR00 (* should never be read or written *) +register (bit[64]) GPR01 +register (bit[64]) GPR02 +register (bit[64]) GPR03 +register (bit[64]) GPR04 +register (bit[64]) GPR05 +register (bit[64]) GPR06 +register (bit[64]) GPR07 +register (bit[64]) GPR08 +register (bit[64]) GPR09 register (bit[64]) GPR10 register (bit[64]) GPR11 register (bit[64]) GPR12 @@ -85,7 +85,7 @@ register (bit[64]) HI register (bit[64]) LO let (vector <0, 32, inc, (register<(bit[64])>) >) GPR = - [ GPR0, GPR1, GPR2, GPR3, GPR4, GPR5, GPR6, GPR7, GPR8, GPR9, GPR10, + [ GPR00, GPR01, GPR02, GPR03, GPR04, GPR05, GPR06, GPR07, GPR08, GPR09, GPR10, GPR11, GPR12, GPR13, GPR14, GPR15, GPR16, GPR17, GPR18, GPR19, GPR20, GPR21, GPR22, GPR23, GPR24, GPR25, GPR26, GPR27, GPR28, GPR29, GPR30, GPR31 ] diff --git a/src/lem_interp/run_with_elf.ml b/src/lem_interp/run_with_elf.ml index f1b19c9c..bcc49173 100644 --- a/src/lem_interp/run_with_elf.ml +++ b/src/lem_interp/run_with_elf.ml @@ -450,16 +450,16 @@ let mips_register_data_all = [ ("exceptionSignalled", (D_decreasing, 1, 0)); ("delayedPC", (D_decreasing, 64, 0)); (* General purpose registers *) - ("GPR0", (D_decreasing, 64, 0)); - ("GPR1", (D_decreasing, 64, 0)); - ("GPR2", (D_decreasing, 64, 0)); - ("GPR3", (D_decreasing, 64, 0)); - ("GPR4", (D_decreasing, 64, 0)); - ("GPR5", (D_decreasing, 64, 0)); - ("GPR6", (D_decreasing, 64, 0)); - ("GPR7", (D_decreasing, 64, 0)); - ("GPR8", (D_decreasing, 64, 0)); - ("GPR9", (D_decreasing, 64, 0)); + ("GPR00", (D_decreasing, 64, 0)); + ("GPR01", (D_decreasing, 64, 0)); + ("GPR02", (D_decreasing, 64, 0)); + ("GPR03", (D_decreasing, 64, 0)); + ("GPR04", (D_decreasing, 64, 0)); + ("GPR05", (D_decreasing, 64, 0)); + ("GPR06", (D_decreasing, 64, 0)); + ("GPR07", (D_decreasing, 64, 0)); + ("GPR08", (D_decreasing, 64, 0)); + ("GPR09", (D_decreasing, 64, 0)); ("GPR10", (D_decreasing, 64, 0)); ("GPR11", (D_decreasing, 64, 0)); ("GPR12", (D_decreasing, 64, 0)); |
