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authorRobert Norton2016-11-09 15:56:06 +0000
committerRobert Norton2016-11-09 15:56:06 +0000
commit6d4ae9042843a87c81c8cd7521c69a7d9195757d (patch)
tree3f856371ac0eaf9edef512bf76f820e90d7debf0
parent95ef30a6d2fd54fe3c1bb315d333cf35e8542a3b (diff)
add CP0LLBit and CP0LLAddr to mips register footprint
-rw-r--r--mips/mips_regfp.sail2
1 files changed, 2 insertions, 0 deletions
diff --git a/mips/mips_regfp.sail b/mips/mips_regfp.sail
index b1a86b56..b7cfce2b 100644
--- a/mips/mips_regfp.sail
+++ b/mips/mips_regfp.sail
@@ -337,6 +337,7 @@ function (regfps,regfps,regfps,niafps,diafp,instruction_kind) initial_analysis (
*)
case (Load(width, signed, linked, base, rt, offset)) -> {
ik := IK_mem_read (if linked then Read_reserve else Read_plain);
+ if linked then oR := RFull("CP0LLBit")::RFull("CP0LLAddr")::oR else ();
if base == 0 then () else aR := RFull(GPRs[base]) :: aR;
iR := aR;
if rt == 0 then () else oR := RFull(GPRs[rt]) :: oR;
@@ -345,6 +346,7 @@ function (regfps,regfps,regfps,niafps,diafp,instruction_kind) initial_analysis (
ik := IK_mem_write(if conditional then Write_conditional else Write_plain);
if base == 0 then () else aR := RFull(GPRs[base]) :: aR;
iR := aR;
+ if conditional then iR := RFull("CP0LLBit")::iR else ();
if rt == 0 then () else iR := RFull(GPRs[rt]) :: iR;
}
case (LWL(base, rt, offset)) -> {