From 096d1e4512d6a8fb99e2de3c0c23e2cb88cc2d7a Mon Sep 17 00:00:00 2001 From: Damien George Date: Mon, 19 Oct 2015 14:26:19 +0100 Subject: py: Add lsl/lsr/asr opcode support to inline Thumb2 assembler. --- tests/inlineasm/asmshift.py | 29 +++++++++++++++++++++++++++++ tests/inlineasm/asmshift.py.exp | 6 ++++++ 2 files changed, 35 insertions(+) create mode 100644 tests/inlineasm/asmshift.py create mode 100644 tests/inlineasm/asmshift.py.exp (limited to 'tests/inlineasm') diff --git a/tests/inlineasm/asmshift.py b/tests/inlineasm/asmshift.py new file mode 100644 index 000000000..0df218734 --- /dev/null +++ b/tests/inlineasm/asmshift.py @@ -0,0 +1,29 @@ +@micropython.asm_thumb +def lsl1(r0): + lsl(r0, r0, 1) +print(hex(lsl1(0x123))) + +@micropython.asm_thumb +def lsl23(r0): + lsl(r0, r0, 23) +print(hex(lsl23(1))) + +@micropython.asm_thumb +def lsr1(r0): + lsr(r0, r0, 1) +print(hex(lsr1(0x123))) + +@micropython.asm_thumb +def lsr31(r0): + lsr(r0, r0, 31) +print(hex(lsr31(0x80000000))) + +@micropython.asm_thumb +def asr1(r0): + asr(r0, r0, 1) +print(hex(asr1(0x123))) + +@micropython.asm_thumb +def asr31(r0): + asr(r0, r0, 31) +print(hex(asr31(0x80000000))) diff --git a/tests/inlineasm/asmshift.py.exp b/tests/inlineasm/asmshift.py.exp new file mode 100644 index 000000000..c6c3a7217 --- /dev/null +++ b/tests/inlineasm/asmshift.py.exp @@ -0,0 +1,6 @@ +0x246 +0x800000 +0x91 +0x1 +0x91 +-0x1 -- cgit v1.2.3