From 8332044f754aa0743fb38404dae55508a0550e6a Mon Sep 17 00:00:00 2001
From: Daniel Campora
Date: Sun, 13 Sep 2015 15:59:45 +0200
Subject: cc3200: Add UART.ODD and UART.EVEN to select parity.

---
 docs/library/pyb.UART.rst | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'docs')

diff --git a/docs/library/pyb.UART.rst b/docs/library/pyb.UART.rst
index 741c4e491..ca1912ef3 100644
--- a/docs/library/pyb.UART.rst
+++ b/docs/library/pyb.UART.rst
@@ -24,7 +24,7 @@ UART objects can be created and initialised using::
 
 .. only:: port_wipy
 
-    Bits can be 5, 6, 7, 8.  Parity can be None, 0 (even) or 1 (odd).  Stop can be 1 or 2.
+    Bits can be 5, 6, 7, 8.  Parity can be ``None``, ``UART.EVEN`` or ``UART.ODD``.  Stop can be 1 or 2.
 
 
 A UART object acts like a stream object and reading and writing is done
@@ -122,7 +122,7 @@ Methods
     
          - ``baudrate`` is the clock rate.
          - ``bits`` is the number of bits per character, 7, 8 or 9.
-         - ``parity`` is the parity, ``None``, 0 (even) or 1 (odd).
+         - ``parity`` is the parity, ``None``, ``UART.EVEN`` or ``UART.ODD``.
          - ``stop`` is the number of stop bits, 1 or 2.
          - ``pins`` is a 4 or 2 item list indicating the TX, RX, RTS and CTS pins (in that order).
            Any of the pins can be None if one wants the UART to operate with limited functionality.
-- 
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