From c13b2f2d0040cdf38ea3178717480d07f02c5245 Mon Sep 17 00:00:00 2001 From: Peter Hinch Date: Mon, 11 Jan 2016 06:48:35 +0000 Subject: docs: Several minor changes: network, pyb, ADCAll and inline asm. --- docs/reference/asm_thumb2_hints_tips.rst | 10 +++++----- docs/reference/asm_thumb2_misc.rst | 3 +++ 2 files changed, 8 insertions(+), 5 deletions(-) (limited to 'docs/reference') diff --git a/docs/reference/asm_thumb2_hints_tips.rst b/docs/reference/asm_thumb2_hints_tips.rst index ae3ce9ac3..119bf980e 100644 --- a/docs/reference/asm_thumb2_hints_tips.rst +++ b/docs/reference/asm_thumb2_hints_tips.rst @@ -78,11 +78,11 @@ three arguments, which must (if used) be named ``r0``, ``r1`` and ``r2``. When the code executes the registers will be initialised to those values. The data types which can be passed in this way are integers and memory -addresses. Further, integers are restricted in that the top two bits -must be identical, limiting the range to -2**30 to 2**30 -1. Return -values are similarly limited. These limitations can be overcome by means -of the ``array`` module to allow any number of values of any type to -be accessed. +addresses. With current firmware all possible 32 bit values may be passed. +Returned integers are restricted in that the top two bits must be identical, +limiting the range to -2**30 to 2**30 -1. The limitations on number of arguments +and return values can be overcome by means of the ``array`` module which enables +any number of values of any type to be accessed. Multiple arguments ~~~~~~~~~~~~~~~~~~ diff --git a/docs/reference/asm_thumb2_misc.rst b/docs/reference/asm_thumb2_misc.rst index eb96f4877..ca3f878cc 100644 --- a/docs/reference/asm_thumb2_misc.rst +++ b/docs/reference/asm_thumb2_misc.rst @@ -5,6 +5,9 @@ Miscellaneous instructions * wfi() Suspend execution in a low power state until an interrupt occurs. * cpsid(flags) set the Priority Mask Register - disable interrupts. * cpsie(flags) clear the Priority Mask Register - enable interrupts. +* mrs(Rd, special_reg) ``Rd = special_reg`` copy a special register to a general register. The special register + may be IPSR (Interrupt Status Register) or BASEPRI (Base Priority Register). The IPSR provides a means of determining + the exception number of an interrupt being processed. It contains zero if no interrupt is being processed. Currently the ``cpsie()`` and ``cpsid()`` functions are partially implemented. They require but ignore the flags argument and serve as a means of enabling and disabling interrupts. -- cgit v1.2.3