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<title>openmano-mpy/ports/stm32/boards/NUCLEO_F746ZG, branch master</title>
<subtitle>MicroPython source and hardware configuration for OpenMano</subtitle>
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<entry>
<title>stm32/board/NUCLEO_F746ZG: Enable Ethernet periph, lwip and ussl.</title>
<updated>2019-09-11T01:20:58+00:00</updated>
<author>
<name>cristian</name>
</author>
<published>2019-09-06T20:50:24+00:00</published>
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<entry>
<title>stm32/boards: Rework all stm32??xx_hal_conf.h files to use common code.</title>
<updated>2019-06-25T04:18:24+00:00</updated>
<author>
<name>Damien George</name>
</author>
<published>2019-06-25T03:42:06+00:00</published>
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This eliminates a lot of duplicated code in these header files.
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This eliminates a lot of duplicated code in these header files.
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</entry>
<entry>
<title>stm32/boards: Update pins.csv to include USB pins where needed.</title>
<updated>2018-05-01T07:38:51+00:00</updated>
<author>
<name>Damien George</name>
</author>
<published>2018-05-01T07:38:51+00:00</published>
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<entry>
<title>stm32/can: Allow CAN pins to be configured per board.</title>
<updated>2018-04-11T06:35:24+00:00</updated>
<author>
<name>Damien George</name>
</author>
<published>2018-04-11T06:27:48+00:00</published>
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This patch allows a given board to configure which pins are used for the
CAN peripherals, in a similar way to all the other bus peripherals (I2C,
UART, SPI).  To enable CAN on a board the mpconfigboard.h file should
define (for example):

    #define MICROPY_HW_CAN1_TX (pin_B9)
    #define MICROPY_HW_CAN1_RX (pin_B8)
    #define MICROPY_HW_CAN2_TX (pin_B13)
    #define MICROPY_HW_CAN2_RX (pin_B12)

And the board config file should no longer define MICROPY_HW_ENABLE_CAN.
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<pre>
This patch allows a given board to configure which pins are used for the
CAN peripherals, in a similar way to all the other bus peripherals (I2C,
UART, SPI).  To enable CAN on a board the mpconfigboard.h file should
define (for example):

    #define MICROPY_HW_CAN1_TX (pin_B9)
    #define MICROPY_HW_CAN1_RX (pin_B8)
    #define MICROPY_HW_CAN2_TX (pin_B13)
    #define MICROPY_HW_CAN2_RX (pin_B12)

And the board config file should no longer define MICROPY_HW_ENABLE_CAN.
</pre>
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</entry>
<entry>
<title>stm32/Makefile: Allow a board to config either 1 or 2 firmware sections.</title>
<updated>2018-03-27T10:24:15+00:00</updated>
<author>
<name>Damien George</name>
</author>
<published>2018-03-27T10:24:15+00:00</published>
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This patch forces a board to explicitly define TEXT1_ADDR in order to
split the firmware into two separate pieces.  Otherwise the default is now
to produce only a single continuous firmware image with all ISR, text and
data together.
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This patch forces a board to explicitly define TEXT1_ADDR in order to
split the firmware into two separate pieces.  Otherwise the default is now
to produce only a single continuous firmware image with all ISR, text and
data together.
</pre>
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</entry>
<entry>
<title>stm32/boards: Allow boards to have finer control over the linker script.</title>
<updated>2018-03-27T10:17:48+00:00</updated>
<author>
<name>Damien George</name>
</author>
<published>2018-03-27T10:17:48+00:00</published>
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This patch allows a particular board to independently specify the linker
scripts for 1) the MCU memory layout; 2) how the different firmware
sections are arranged in memory.  Right now all boards follow the same
layout with two separate firmware section, one for the ISR and one for the
text and data.  This leaves room for storage (filesystem data) to live
between the firmware sections.

The idea with this patch is to accommodate boards that don't have internal
flash storage and only need to have one continuous firmware section.  Thus
the common.ld script is renamed to common_ifs.ld to make explicit that it
is used for cases where the board has internal flash storage.
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<pre>
This patch allows a particular board to independently specify the linker
scripts for 1) the MCU memory layout; 2) how the different firmware
sections are arranged in memory.  Right now all boards follow the same
layout with two separate firmware section, one for the ISR and one for the
text and data.  This leaves room for storage (filesystem data) to live
between the firmware sections.

The idea with this patch is to accommodate boards that don't have internal
flash storage and only need to have one continuous firmware section.  Thus
the common.ld script is renamed to common_ifs.ld to make explicit that it
is used for cases where the board has internal flash storage.
</pre>
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</entry>
<entry>
<title>stm32/boards: Update all boards to work with new USB configuration.</title>
<updated>2018-02-13T07:57:01+00:00</updated>
<author>
<name>Damien George</name>
</author>
<published>2018-02-13T07:57:01+00:00</published>
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<pre>
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<entry>
<title>stm32/boards: Remove all config options that are set to defaults.</title>
<updated>2018-02-09T07:40:40+00:00</updated>
<author>
<name>Damien George</name>
</author>
<published>2018-02-09T07:40:40+00:00</published>
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mpconfigboard_common.h now sets the defaults so there is no longer a need
to explicitly list all configuration options in a board's mpconfigboard.h
file.
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<pre>
mpconfigboard_common.h now sets the defaults so there is no longer a need
to explicitly list all configuration options in a board's mpconfigboard.h
file.
</pre>
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</content>
</entry>
<entry>
<title>stm32/boards: Add support for NUCLEO-F746ZG evaluation board.</title>
<updated>2017-11-20T03:42:05+00:00</updated>
<author>
<name>Jaroslav Sykora</name>
</author>
<published>2017-11-19T14:27:31+00:00</published>
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This is a low-cost evaluation kit board from ST based on the STM32
Nucleo-144 form factor.  It uses the STM32F746ZG MCU in the LQFP144
package.  The MCU has 1MB of flash and 320kB of System RAM.
Cortex-M7 runs at up to 216MHz.
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This is a low-cost evaluation kit board from ST based on the STM32
Nucleo-144 form factor.  It uses the STM32F746ZG MCU in the LQFP144
package.  The MCU has 1MB of flash and 320kB of System RAM.
Cortex-M7 runs at up to 216MHz.
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