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import chisel3._
import chisel3.stage.ChiselStage
object TypeArithmetic {
implicit val f1: SomeTypeContainer => SomeTypeContainer => SomeTypeContainer = (a: SomeTypeContainer) => (b: SomeTypeContainer) => new SomeTypeContainer(a.i+b.i)
implicit val f2: SomeTypeContainer => Int => SomeTypeContainer = (a: SomeTypeContainer) => (b: Int) => new SomeTypeContainer(b+a.i)
implicit val f3: SomeTypeContainer => UInt => SomeTypeContainer = (a: SomeTypeContainer) => (b: UInt) => {
val litval: Int = 1
new SomeTypeContainer(litval.toInt+a.i)
}
// Dynamically create an IO
// implicit val f4: UInt => UInt => (() => Any) = (a: UInt) => (b: UInt) => (() => Wire(a))
implicit val f5 = (new Op[UInt, UInt, () => UInt]((a: UInt) => (b: UInt) => (() => IO(a)))).f
}
case class SomeTypeContainer(i: Int)
object AbstractModuleStandalone {
class SomeModule extends Module
def main(args: Array[String]): Unit = {
val foo: Int = 1
val bar: SomeTypeContainer = SomeTypeContainer(2)
val baz: UInt = UInt(1.W)
val afoo = AbstractInterface[UInt](Input(UInt(4.W)))
val abar = AbstractInterface[UInt](Output(UInt(8.W)))
val abaz = AbstractInterface[SomeTypeContainer](SomeTypeContainer(16))
import MetaConnect._
import TypeArithmetic._
val barfoobarbar = bar makeConnection foo makeConnection bar makeConnection bar
val barbazfoo = bar makeConnection baz makeConnection foo
val abazafoo = abaz makeConnection afoo
val afooabar = afoo makeConnection abar
val topIface = Seq(abazafoo, afooabar)
def topBody(iface: Seq[AbstractInterface[_]]): () => Module = {
val k = () => new SomeModule {
iface.foreach { x => x.params match {
case some: UInt => x.params.asInstanceOf[UInt] := 19.U
case _ =>
}}
}
k
}
println(ChiselStage.emitFirrtl({
(new AbstractModule(Seq(abazafoo, afooabar))(topBody)).comp()
}))
}
}
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