From c9dd94dd6968cba5ecd44fee6df3071cb7a25a9c Mon Sep 17 00:00:00 2001
From: Andrew Waterman
Date: Wed, 27 Jan 2016 15:20:44 -0800
Subject: Use FIRRTL node rem, not mod, for %

---
 src/main/scala/Chisel/Bits.scala               | 4 ++--
 src/main/scala/Chisel/internal/firrtl/IR.scala | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

(limited to 'src')

diff --git a/src/main/scala/Chisel/Bits.scala b/src/main/scala/Chisel/Bits.scala
index 6062f2de..4a9a6074 100644
--- a/src/main/scala/Chisel/Bits.scala
+++ b/src/main/scala/Chisel/Bits.scala
@@ -283,7 +283,7 @@ sealed class UInt private[Chisel] (dir: Direction, width: Width, lit: Option[ULi
   def * (other: UInt): UInt = binop(UInt(this.width + other.width), TimesOp, other)
   def * (other: SInt): SInt = other * this
   def / (other: UInt): UInt = binop(UInt(this.width), DivideOp, other)
-  def % (other: UInt): UInt = binop(UInt(this.width), ModOp, other)
+  def % (other: UInt): UInt = binop(UInt(this.width), RemOp, other)
 
   def & (other: UInt): UInt = binop(UInt(this.width max other.width), BitAndOp, other)
   def | (other: UInt): UInt = binop(UInt(this.width max other.width), BitOrOp, other)
@@ -420,7 +420,7 @@ sealed class SInt private (dir: Direction, width: Width, lit: Option[SLit] = Non
   def * (other: SInt): SInt = binop(SInt(this.width + other.width), TimesOp, other)
   def * (other: UInt): SInt = binop(SInt(this.width + other.width), TimesOp, other)
   def / (other: SInt): SInt = binop(SInt(this.width), DivideOp, other)
-  def % (other: SInt): SInt = binop(SInt(this.width), ModOp, other)
+  def % (other: SInt): SInt = binop(SInt(this.width), RemOp, other)
 
   def & (other: SInt): SInt = binop(UInt(this.width max other.width), BitAndOp, other).asSInt
   def | (other: SInt): SInt = binop(UInt(this.width max other.width), BitOrOp, other).asSInt
diff --git a/src/main/scala/Chisel/internal/firrtl/IR.scala b/src/main/scala/Chisel/internal/firrtl/IR.scala
index 1bc3ad89..cc80e3aa 100644
--- a/src/main/scala/Chisel/internal/firrtl/IR.scala
+++ b/src/main/scala/Chisel/internal/firrtl/IR.scala
@@ -15,7 +15,7 @@ object PrimOp {
   val SubModOp = PrimOp("subw")
   val TimesOp = PrimOp("mul")
   val DivideOp = PrimOp("div")
-  val ModOp = PrimOp("mod")
+  val RemOp = PrimOp("rem")
   val ShiftLeftOp = PrimOp("shl")
   val ShiftRightOp = PrimOp("shr")
   val DynamicShiftLeftOp = PrimOp("dshl")
-- 
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