From a69f8ad1a82b60831b40eae4042884f9251ef2c6 Mon Sep 17 00:00:00 2001
From: Andrew Waterman
Date: Thu, 13 Aug 2015 16:15:18 -0700
Subject: Add back missing () on toBits declaration

---
 src/main/scala/Chisel/Core.scala | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src')

diff --git a/src/main/scala/Chisel/Core.scala b/src/main/scala/Chisel/Core.scala
index d89a4557..e7dce33a 100644
--- a/src/main/scala/Chisel/Core.scala
+++ b/src/main/scala/Chisel/Core.scala
@@ -90,7 +90,7 @@ abstract class Data(dirArg: Direction) extends HasId {
     }
     wire.asInstanceOf[this.type]
   }
-  def toBits: UInt = this.flatten.reverse.reduce(_##_)
+  def toBits(): UInt = this.flatten.reverse.reduce(_##_)
   def toPort: Port = Port(this, toType)
 }
 
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