From 66301b9042530a5265c18c97a0dab9022a0efc50 Mon Sep 17 00:00:00 2001 From: ducky Date: Wed, 1 Jun 2016 12:17:25 -0700 Subject: Move chisel/... to chisel/core/..., make chisel/compatibility package/folder, move more things into utils --- src/main/scala/Chisel/BitPat.scala | 88 --------------------- src/main/scala/chisel/FileSystemUtilities.scala | 10 --- src/main/scala/chisel/ImplicitConversions.scala | 8 -- src/main/scala/chisel/Main.scala | 17 ----- src/main/scala/chisel/compatibility.scala | 14 ++-- .../chisel/compatibility/FileSystemUtilities.scala | 12 +++ src/main/scala/chisel/compatibility/Main.scala | 19 +++++ .../chisel/compatibility/throwException.scala | 14 ++++ src/main/scala/chisel/package.scala | 1 + src/main/scala/chisel/throwException.scala | 12 --- src/main/scala/chisel/util/BitPat.scala | 89 ++++++++++++++++++++++ .../scala/chisel/util/ImplicitConversions.scala | 10 +++ 12 files changed, 152 insertions(+), 142 deletions(-) delete mode 100644 src/main/scala/Chisel/BitPat.scala delete mode 100644 src/main/scala/chisel/FileSystemUtilities.scala delete mode 100644 src/main/scala/chisel/ImplicitConversions.scala delete mode 100644 src/main/scala/chisel/Main.scala create mode 100644 src/main/scala/chisel/compatibility/FileSystemUtilities.scala create mode 100644 src/main/scala/chisel/compatibility/Main.scala create mode 100644 src/main/scala/chisel/compatibility/throwException.scala delete mode 100644 src/main/scala/chisel/throwException.scala create mode 100644 src/main/scala/chisel/util/BitPat.scala create mode 100644 src/main/scala/chisel/util/ImplicitConversions.scala (limited to 'src') diff --git a/src/main/scala/Chisel/BitPat.scala b/src/main/scala/Chisel/BitPat.scala deleted file mode 100644 index a6833ed2..00000000 --- a/src/main/scala/Chisel/BitPat.scala +++ /dev/null @@ -1,88 +0,0 @@ -// See LICENSE for license details. - -package chisel - -import scala.language.experimental.macros - -import chisel.internal.sourceinfo.{SourceInfo, SourceInfoTransform} - -object BitPat { - /** Parses a bit pattern string into (bits, mask, width). - * - * @return bits the literal value, with don't cares being 0 - * @return mask the mask bits, with don't cares being 0 and cares being 1 - * @return width the number of bits in the literal, including values and - * don't cares. - */ - private def parse(x: String): (BigInt, BigInt, Int) = { - // Notes: - // While Verilog Xs also handle octal and hex cases, there isn't a - // compelling argument and no one has asked for it. - // If ? parsing is to be exposed, the return API needs further scrutiny - // (especially with things like mask polarity). - require(x.head == 'b', "BitPats must be in binary and be prefixed with 'b'") - var bits = BigInt(0) - var mask = BigInt(0) - for (d <- x.tail) { - if (d != '_') { - require("01?".contains(d), "Literal: " + x + " contains illegal character: " + d) - mask = (mask << 1) + (if (d == '?') 0 else 1) - bits = (bits << 1) + (if (d == '1') 1 else 0) - } - } - (bits, mask, x.length - 1) - } - - /** Creates a [[BitPat]] literal from a string. - * - * @param n the literal value as a string, in binary, prefixed with 'b' - * @note legal characters are '0', '1', and '?', as well as '_' as white - * space (which are ignored) - */ - def apply(n: String): BitPat = { - val (bits, mask, width) = parse(n) - new BitPat(bits, mask, width) - } - - /** Creates a [[BitPat]] of all don't cares of the specified bitwidth. */ - def dontCare(width: Int): BitPat = BitPat("b" + ("?" * width)) - - @deprecated("Use BitPat.dontCare", "chisel3") - def DC(width: Int): BitPat = dontCare(width) // scalastyle:ignore method.name - - /** Allows BitPats to be used where a UInt is expected. - * - * @note the BitPat must not have don't care bits (will error out otherwise) - */ - def bitPatToUInt(x: BitPat): UInt = { - require(x.mask == (BigInt(1) << x.getWidth) - 1) - UInt(x.value, x.getWidth) - } - - /** Allows UInts to be used where a BitPat is expected, useful for when an - * interface is defined with BitPats but not all cases need the partial - * matching capability. - * - * @note the UInt must be a literal - */ - def apply(x: UInt): BitPat = { - require(x.isLit) - BitPat("b" + x.litValue.toString(2)) - } -} - -// TODO: Break out of Core? (this doesn't involve FIRRTL generation) -/** Bit patterns are literals with masks, used to represent values with don't - * cares. Equality comparisons will ignore don't care bits (for example, - * BitPat(0b10?1) === UInt(0b1001) and UInt(0b1011)). - */ -sealed class BitPat(val value: BigInt, val mask: BigInt, width: Int) { - def getWidth: Int = width - def === (that: UInt): Bool = macro SourceInfoTransform.thatArg - def =/= (that: UInt): Bool = macro SourceInfoTransform.thatArg - def != (that: UInt): Bool = macro SourceInfoTransform.thatArg - - def do_=== (that: UInt)(implicit sourceInfo: SourceInfo): Bool = UInt(value) === (that & UInt(mask)) - def do_=/= (that: UInt)(implicit sourceInfo: SourceInfo): Bool = !(this === that) - def do_!= (that: UInt)(implicit sourceInfo: SourceInfo): Bool = this =/= that -} diff --git a/src/main/scala/chisel/FileSystemUtilities.scala b/src/main/scala/chisel/FileSystemUtilities.scala deleted file mode 100644 index f100eaf6..00000000 --- a/src/main/scala/chisel/FileSystemUtilities.scala +++ /dev/null @@ -1,10 +0,0 @@ -// See LICENSE for license details. - -package chisel - -@deprecated("FileSystemUtilities doesn't exist in chisel3", "3.0.0") -trait FileSystemUtilities { - def createOutputFile(name: String): java.io.FileWriter = { - new java.io.FileWriter(Driver.targetDir + "/" + name) - } -} diff --git a/src/main/scala/chisel/ImplicitConversions.scala b/src/main/scala/chisel/ImplicitConversions.scala deleted file mode 100644 index f786d4f1..00000000 --- a/src/main/scala/chisel/ImplicitConversions.scala +++ /dev/null @@ -1,8 +0,0 @@ -// See LICENSE for license details. - -package chisel - -object ImplicitConversions { - implicit def intToUInt(x: Int): UInt = UInt(x) - implicit def booleanToBool(x: Boolean): Bool = Bool(x) -} diff --git a/src/main/scala/chisel/Main.scala b/src/main/scala/chisel/Main.scala deleted file mode 100644 index 79e5c9ca..00000000 --- a/src/main/scala/chisel/Main.scala +++ /dev/null @@ -1,17 +0,0 @@ -// See LICENSE for license details. - -package chisel - -import java.io.File - -@deprecated("chiselMain doesn't exist in Chisel3", "3.0") object chiselMain { - def apply[T <: Module](args: Array[String], gen: () => T): Unit = - Predef.assert(false, "No more chiselMain in Chisel3") - - def run[T <: Module] (args: Array[String], gen: () => T): Unit = { - val circuit = Driver.elaborate(gen) - Driver.parseArgs(args) - val output_file = new File(Driver.targetDir + "/" + circuit.name + ".fir") - Driver.dumpFirrtl(circuit, Option(output_file)) - } -} diff --git a/src/main/scala/chisel/compatibility.scala b/src/main/scala/chisel/compatibility.scala index 9cdef80d..6e72cdd3 100644 --- a/src/main/scala/chisel/compatibility.scala +++ b/src/main/scala/chisel/compatibility.scala @@ -23,9 +23,6 @@ package object Chisel { val assert = chisel.assert - val BitPat = chisel.BitPat - type BitPat = chisel.BitPat - type Element = chisel.Element type Bits = chisel.Bits val Bits = chisel.Bits @@ -59,10 +56,10 @@ package object Chisel { type BackendCompilationUtilities = chisel.BackendCompilationUtilities val Driver = chisel.Driver - type FileSystemUtilities = chisel.FileSystemUtilities - val ImplicitConversions = chisel.ImplicitConversions - val chiselMain = chisel.chiselMain - val throwException = chisel.throwException + type FileSystemUtilities = chisel.compatibility.FileSystemUtilities + val ImplicitConversions = chisel.util.ImplicitConversions + val chiselMain = chisel.compatibility.chiselMain + val throwException = chisel.compatibility.throwException object testers { @@ -77,6 +74,9 @@ package object Chisel { val log2Floor = chisel.util.log2Floor val isPow2 = chisel.util.isPow2 + val BitPat = chisel.util.BitPat + type BitPat = chisel.util.BitPat + type ArbiterIO[T <: Data] = chisel.util.ArbiterIO[T] type LockingArbiterLike[T <: Data] = chisel.util.LockingArbiterLike[T] type LockingRRArbiter[T <: Data] = chisel.util.LockingRRArbiter[T] diff --git a/src/main/scala/chisel/compatibility/FileSystemUtilities.scala b/src/main/scala/chisel/compatibility/FileSystemUtilities.scala new file mode 100644 index 00000000..d12e627d --- /dev/null +++ b/src/main/scala/chisel/compatibility/FileSystemUtilities.scala @@ -0,0 +1,12 @@ +// See LICENSE for license details. + +package chisel.compatibility + +import chisel._ + +@deprecated("FileSystemUtilities doesn't exist in chisel3", "3.0.0") +trait FileSystemUtilities { + def createOutputFile(name: String): java.io.FileWriter = { + new java.io.FileWriter(Driver.targetDir + "/" + name) + } +} diff --git a/src/main/scala/chisel/compatibility/Main.scala b/src/main/scala/chisel/compatibility/Main.scala new file mode 100644 index 00000000..9072bfcf --- /dev/null +++ b/src/main/scala/chisel/compatibility/Main.scala @@ -0,0 +1,19 @@ +// See LICENSE for license details. + +package chisel.compatibility + +import java.io.File + +import chisel._ + +@deprecated("chiselMain doesn't exist in Chisel3", "3.0") object chiselMain { + def apply[T <: Module](args: Array[String], gen: () => T): Unit = + Predef.assert(false, "No more chiselMain in Chisel3") + + def run[T <: Module] (args: Array[String], gen: () => T): Unit = { + val circuit = Driver.elaborate(gen) + Driver.parseArgs(args) + val output_file = new File(Driver.targetDir + "/" + circuit.name + ".fir") + Driver.dumpFirrtl(circuit, Option(output_file)) + } +} diff --git a/src/main/scala/chisel/compatibility/throwException.scala b/src/main/scala/chisel/compatibility/throwException.scala new file mode 100644 index 00000000..3b9fd06e --- /dev/null +++ b/src/main/scala/chisel/compatibility/throwException.scala @@ -0,0 +1,14 @@ +// See LICENSE for license details. + +package chisel.compatibility + +import chisel._ + +@deprecated("throwException doesn't exist in Chisel3", "3.0.0") +@throws(classOf[Exception]) +object throwException { + def apply(s: String, t: Throwable = null) = { + val xcpt = new Exception(s, t) + throw xcpt + } +} diff --git a/src/main/scala/chisel/package.scala b/src/main/scala/chisel/package.scala index 1abbc74f..b6036c75 100644 --- a/src/main/scala/chisel/package.scala +++ b/src/main/scala/chisel/package.scala @@ -3,6 +3,7 @@ package object chisel { import internal.firrtl.Width import internal.sourceinfo.{SourceInfo, SourceInfoTransform} + import util.BitPat implicit class fromBigIntToLiteral(val x: BigInt) extends AnyVal { def U: UInt = UInt(x, Width()) diff --git a/src/main/scala/chisel/throwException.scala b/src/main/scala/chisel/throwException.scala deleted file mode 100644 index fdd62c7e..00000000 --- a/src/main/scala/chisel/throwException.scala +++ /dev/null @@ -1,12 +0,0 @@ -// See LICENSE for license details. - -package chisel - -@deprecated("throwException doesn't exist in Chisel3", "3.0.0") -@throws(classOf[Exception]) -object throwException { - def apply(s: String, t: Throwable = null) = { - val xcpt = new Exception(s, t) - throw xcpt - } -} diff --git a/src/main/scala/chisel/util/BitPat.scala b/src/main/scala/chisel/util/BitPat.scala new file mode 100644 index 00000000..13bbe1b0 --- /dev/null +++ b/src/main/scala/chisel/util/BitPat.scala @@ -0,0 +1,89 @@ +// See LICENSE for license details. + +package chisel.util + +import scala.language.experimental.macros + +import chisel._ +import chisel.internal.sourceinfo.{SourceInfo, SourceInfoTransform} + +object BitPat { + /** Parses a bit pattern string into (bits, mask, width). + * + * @return bits the literal value, with don't cares being 0 + * @return mask the mask bits, with don't cares being 0 and cares being 1 + * @return width the number of bits in the literal, including values and + * don't cares. + */ + private def parse(x: String): (BigInt, BigInt, Int) = { + // Notes: + // While Verilog Xs also handle octal and hex cases, there isn't a + // compelling argument and no one has asked for it. + // If ? parsing is to be exposed, the return API needs further scrutiny + // (especially with things like mask polarity). + require(x.head == 'b', "BitPats must be in binary and be prefixed with 'b'") + var bits = BigInt(0) + var mask = BigInt(0) + for (d <- x.tail) { + if (d != '_') { + require("01?".contains(d), "Literal: " + x + " contains illegal character: " + d) + mask = (mask << 1) + (if (d == '?') 0 else 1) + bits = (bits << 1) + (if (d == '1') 1 else 0) + } + } + (bits, mask, x.length - 1) + } + + /** Creates a [[BitPat]] literal from a string. + * + * @param n the literal value as a string, in binary, prefixed with 'b' + * @note legal characters are '0', '1', and '?', as well as '_' as white + * space (which are ignored) + */ + def apply(n: String): BitPat = { + val (bits, mask, width) = parse(n) + new BitPat(bits, mask, width) + } + + /** Creates a [[BitPat]] of all don't cares of the specified bitwidth. */ + def dontCare(width: Int): BitPat = BitPat("b" + ("?" * width)) + + @deprecated("Use BitPat.dontCare", "chisel3") + def DC(width: Int): BitPat = dontCare(width) // scalastyle:ignore method.name + + /** Allows BitPats to be used where a UInt is expected. + * + * @note the BitPat must not have don't care bits (will error out otherwise) + */ + def bitPatToUInt(x: BitPat): UInt = { + require(x.mask == (BigInt(1) << x.getWidth) - 1) + UInt(x.value, x.getWidth) + } + + /** Allows UInts to be used where a BitPat is expected, useful for when an + * interface is defined with BitPats but not all cases need the partial + * matching capability. + * + * @note the UInt must be a literal + */ + def apply(x: UInt): BitPat = { + require(x.isLit) + BitPat("b" + x.litValue.toString(2)) + } +} + +// TODO: Break out of Core? (this doesn't involve FIRRTL generation) +/** Bit patterns are literals with masks, used to represent values with don't + * cares. Equality comparisons will ignore don't care bits (for example, + * BitPat(0b10?1) === UInt(0b1001) and UInt(0b1011)). + */ +sealed class BitPat(val value: BigInt, val mask: BigInt, width: Int) { + def getWidth: Int = width + def === (that: UInt): Bool = macro SourceInfoTransform.thatArg + def =/= (that: UInt): Bool = macro SourceInfoTransform.thatArg + def != (that: UInt): Bool = macro SourceInfoTransform.thatArg + + def do_=== (that: UInt)(implicit sourceInfo: SourceInfo): Bool = UInt(value) === (that & UInt(mask)) + def do_=/= (that: UInt)(implicit sourceInfo: SourceInfo): Bool = !(this === that) + def do_!= (that: UInt)(implicit sourceInfo: SourceInfo): Bool = this =/= that +} diff --git a/src/main/scala/chisel/util/ImplicitConversions.scala b/src/main/scala/chisel/util/ImplicitConversions.scala new file mode 100644 index 00000000..846c0cbd --- /dev/null +++ b/src/main/scala/chisel/util/ImplicitConversions.scala @@ -0,0 +1,10 @@ +// See LICENSE for license details. + +package chisel.util + +import chisel._ + +object ImplicitConversions { + implicit def intToUInt(x: Int): UInt = UInt(x) + implicit def booleanToBool(x: Boolean): Bool = Bool(x) +} -- cgit v1.2.3