From 344978a378e5297d43a4159f6ae6f81ab4eede6b Mon Sep 17 00:00:00 2001
From: Andrew Waterman
Date: Tue, 28 Jul 2015 04:34:04 -0700
Subject: Add missing Vec operator

---
 src/main/scala/Chisel/Core.scala | 3 +++
 1 file changed, 3 insertions(+)

(limited to 'src')

diff --git a/src/main/scala/Chisel/Core.scala b/src/main/scala/Chisel/Core.scala
index fce33253..22bb555c 100644
--- a/src/main/scala/Chisel/Core.scala
+++ b/src/main/scala/Chisel/Core.scala
@@ -488,6 +488,9 @@ class Vec[T <: Data](elts: Iterable[T], dirArg: Direction = NO_DIR) extends Aggr
   def <> (that: Iterable[T]): Unit =
     this <> Vec(that).asInstanceOf[Data]
 
+  def := (that: Iterable[T]): Unit =
+    this := Vec(that).asInstanceOf[Data]
+
   override def isReg = elt0.isReg
   override def isFlip = {
     val isSubFlip = elt0.isFlip
-- 
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