From cd016b42a0c940f671bdd3c117b8f0ae3c4b30b5 Mon Sep 17 00:00:00 2001
From: ducky
Date: Wed, 9 Dec 2015 14:18:46 -0800
Subject: Extend TesterDriver to optionally take in additional Verilog sources

---
 src/test/scala/chiselTests/Harness.scala | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/test')

diff --git a/src/test/scala/chiselTests/Harness.scala b/src/test/scala/chiselTests/Harness.scala
index 31a219e4..5c2d29d4 100644
--- a/src/test/scala/chiselTests/Harness.scala
+++ b/src/test/scala/chiselTests/Harness.scala
@@ -54,7 +54,7 @@ int main(int argc, char **argv, char **env) {
     val vDut = make(fname)
     val vH = new File(path + "/V" + prefix + ".h")
     val cppHarness = makeCppHarness(fname)
-    verilogToCpp(target, dir, vDut, cppHarness, vH).!
+    verilogToCpp(target, dir, vDut, Seq(), cppHarness, vH).!
     cppToExe(prefix, dir).!
     prefix
   }
-- 
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