From 24ad38ab28b888e73217a5532cac2f0d2b9a4bc2 Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Wed, 1 Feb 2017 10:28:43 -0800
Subject: Move backend compilation utilities (#400)

* Move copyResourceToFile() to BackendCompilationUtilities.
* Move BackendCompilationUtilities into a firrtl util package.
Some of this could be moved into a more general tools package, but since chisel3 already has a dependency on firrtl ...
* Push util down into firrtl so as not to conflict with scala.util.
* Use new createTestDirectory. Fixes #452.
---
 src/test/scala/chiselTests/Harness.scala | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

(limited to 'src/test')

diff --git a/src/test/scala/chiselTests/Harness.scala b/src/test/scala/chiselTests/Harness.scala
index 8a12cd7b..1da3d166 100644
--- a/src/test/scala/chiselTests/Harness.scala
+++ b/src/test/scala/chiselTests/Harness.scala
@@ -6,9 +6,10 @@ import chisel3.testers.BasicTester
 import org.scalatest._
 import org.scalatest.prop._
 import java.io.File
+import firrtl.util.BackendCompilationUtilities
 
 class HarnessSpec extends ChiselPropSpec
-  with chisel3.BackendCompilationUtilities {
+  with BackendCompilationUtilities {
 
   def makeTrivialVerilog: (File => File) = makeHarness((prefix: String) => s"""
 module ${prefix};
@@ -55,13 +56,13 @@ void vl_finish(const char* filename, int linenum, const char* hier) {
     */
   def simpleHarnessBackend(make: File => File): (File, String) = {
     val target = "test"
-    val path = createTempDirectory(target)
+    val path = createTestDirectory(target)
     val fname = new File(path, target)
 
     val cppHarness = makeCppHarness(fname)
 
     make(fname)
-    verilogToCpp(target, target, path, Seq(), cppHarness).!
+    verilogToCpp(target, path, Seq(), cppHarness).!
     cppToExe(target, path).!
     (path, target)
   }
-- 
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