From 5509cdd4c8332c53151e10ba5bdbe0684af1c05b Mon Sep 17 00:00:00 2001 From: Martin Schoeberl Date: Fri, 25 Jan 2019 23:24:01 -0800 Subject: WireDefault instead of WireInit, keep WireInit around (#986) --- src/test/scala/chiselTests/TesterDriverSpec.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/test/scala/chiselTests/TesterDriverSpec.scala') diff --git a/src/test/scala/chiselTests/TesterDriverSpec.scala b/src/test/scala/chiselTests/TesterDriverSpec.scala index f3cf3bca..a7137699 100644 --- a/src/test/scala/chiselTests/TesterDriverSpec.scala +++ b/src/test/scala/chiselTests/TesterDriverSpec.scala @@ -21,7 +21,7 @@ class FinishTester extends BasicTester { stop() } - val test_wire = WireInit(1.U(test_wire_width.W)) + val test_wire = WireDefault(1.U(test_wire_width.W)) // though we just set test_wire to 1, the assert below will pass because // the finish will change its value -- cgit v1.2.3