From 5509cdd4c8332c53151e10ba5bdbe0684af1c05b Mon Sep 17 00:00:00 2001
From: Martin Schoeberl
Date: Fri, 25 Jan 2019 23:24:01 -0800
Subject: WireDefault instead of WireInit, keep WireInit around (#986)

---
 src/test/scala/chiselTests/PrintableSpec.scala | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'src/test/scala/chiselTests/PrintableSpec.scala')

diff --git a/src/test/scala/chiselTests/PrintableSpec.scala b/src/test/scala/chiselTests/PrintableSpec.scala
index 6d74fbc0..6ae38a24 100644
--- a/src/test/scala/chiselTests/PrintableSpec.scala
+++ b/src/test/scala/chiselTests/PrintableSpec.scala
@@ -65,7 +65,7 @@ class PrintableSpec extends FlatSpec with Matchers {
   }
   it should "generate proper printf for simple Decimal printing" in {
     class MyModule extends BasicTester {
-      val myWire = WireInit(1234.U)
+      val myWire = WireDefault(1234.U)
       printf(p"myWire = ${Decimal(myWire)}")
     }
     val firrtl = Driver.emit(() => new MyModule)
@@ -142,8 +142,8 @@ class PrintableSpec extends FlatSpec with Matchers {
   }
   it should "print UInts and SInts as Decimal by default" in {
     class MyModule extends BasicTester {
-      val myUInt = WireInit(0.U)
-      val mySInt = WireInit(-1.S)
+      val myUInt = WireDefault(0.U)
+      val mySInt = WireDefault(-1.S)
       printf(p"$myUInt & $mySInt")
     }
     val firrtl = Driver.emit(() => new MyModule)
-- 
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