From d0cdd3b4c3713bb7454868fac7fa9c43bae2332c Mon Sep 17 00:00:00 2001
From: Jack Koenig
Date: Fri, 1 Jun 2018 12:16:11 -0700
Subject: Literals set their ref so they no longer get named (#826)

Fixes #763
Add tests for #763 and #472

This has a few implications
* Constructing a literal no longer increments _T_ suffixes
* Internally, wrapping a literal Bits in Node(...) will work
* Literal Bools work in withReset/withClockAndReset---
 src/test/scala/chiselTests/MultiClockSpec.scala | 12 ++++++++++++
 1 file changed, 12 insertions(+)

(limited to 'src/test/scala/chiselTests/MultiClockSpec.scala')

diff --git a/src/test/scala/chiselTests/MultiClockSpec.scala b/src/test/scala/chiselTests/MultiClockSpec.scala
index 7886649f..778806e3 100644
--- a/src/test/scala/chiselTests/MultiClockSpec.scala
+++ b/src/test/scala/chiselTests/MultiClockSpec.scala
@@ -142,6 +142,18 @@ class MultiClockSpec extends ChiselFlatSpec {
       assert(withReset(this.reset) { 5 } == 5)
     })
   }
+  it should "support literal Bools" in {
+    assertTesterPasses(new BasicTester {
+      val reg = withReset(true.B) {
+        RegInit(6.U)
+      }
+      reg := reg - 1.U
+      // The reg is always in reset so will never decrement
+      chisel3.assert(reg === 6.U)
+      val (_, done) = Counter(true.B, 4)
+      when (done) { stop() }
+    })
+  }
 
   "withClockAndReset" should "return like a normal Scala block" in {
     elaborate(new BasicTester {
-- 
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