From 2dce378deda1cc33833eb378c89a1c5415817bae Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Wed, 20 Jul 2016 14:49:35 -0700
Subject: Distinguish between ?Int.Lit and ?Int.width

---
 src/test/scala/chiselTests/LFSR16.scala | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/test/scala/chiselTests/LFSR16.scala')

diff --git a/src/test/scala/chiselTests/LFSR16.scala b/src/test/scala/chiselTests/LFSR16.scala
index 2d5e7f3e..b13b67e3 100644
--- a/src/test/scala/chiselTests/LFSR16.scala
+++ b/src/test/scala/chiselTests/LFSR16.scala
@@ -9,7 +9,7 @@ import chisel3.util._
 class LFSR16 extends Module {
   val io = IO(new Bundle {
     val inc = Input(Bool())
-    val out = Output(UInt(16))
+    val out = Output(UInt.width(16))
   })
   val res = Reg(init = UInt(1, 16))
   when (io.inc) {
-- 
cgit v1.2.3