From 06df5adfd78061aa5ae7567882fb8c42d7260a46 Mon Sep 17 00:00:00 2001
From: Jack Koenig
Date: Tue, 10 Jan 2017 17:18:09 -0800
Subject: Make stop() immediately end simulation for Verilator tests (#434)

---
 src/test/scala/chiselTests/Harness.scala | 5 +++++
 1 file changed, 5 insertions(+)

(limited to 'src/test/scala/chiselTests/Harness.scala')

diff --git a/src/test/scala/chiselTests/Harness.scala b/src/test/scala/chiselTests/Harness.scala
index 83f60391..8a12cd7b 100644
--- a/src/test/scala/chiselTests/Harness.scala
+++ b/src/test/scala/chiselTests/Harness.scala
@@ -43,6 +43,11 @@ int main(int argc, char **argv, char **env) {
     delete top;
     exit(0);
 }
+
+void vl_finish(const char* filename, int linenum, const char* hier) {
+  Verilated::flushCall();
+  exit(0);
+}
 """, ".cpp") _
 
   /** Compiles a C++ emulator from Verilog and returns the path to the
-- 
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