From 6e03f63d525aac0bdf4a59b6fe66a0b4d5a3a25a Mon Sep 17 00:00:00 2001
From: Schuyler Eldridge
Date: Tue, 16 Jun 2020 11:59:15 -0400
Subject: Use ChiselStage in Tests

This migrates the tests to Chisel 3.4/FIRRTL 1.4. This primarily
involves removing usages of deprecated methods including:

- Remove usages of Driver
- Use ChiselStage methods instead of BackendCompilationUtilities
  methods
- Use Dependency API for custom transforms
- Use extractCause to unpack StackError

Signed-off-by: Schuyler Eldridge <schuyler.eldridge@ibm.com>
---
 src/test/scala/chiselTests/ExtModule.scala | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src/test/scala/chiselTests/ExtModule.scala')

diff --git a/src/test/scala/chiselTests/ExtModule.scala b/src/test/scala/chiselTests/ExtModule.scala
index 0349d180..582a05ae 100644
--- a/src/test/scala/chiselTests/ExtModule.scala
+++ b/src/test/scala/chiselTests/ExtModule.scala
@@ -4,6 +4,7 @@ package chiselTests
 
 import chisel3._
 import chisel3.experimental._
+import chisel3.stage.ChiselStage
 import chisel3.testers.BasicTester
 
 // Avoid collisions with regular BlackBox tests by putting ExtModule blackboxes
@@ -68,7 +69,7 @@ class ExtModuleSpec extends ChiselFlatSpec {
         Seq("/chisel3/BlackBoxTest.v"))
   }
   "DataMirror.modulePorts" should "work with ExtModule" in {
-    elaborate(new Module {
+    ChiselStage.elaborate(new Module {
       val io = IO(new Bundle { })
       val m = Module(new ExtModule.BlackBoxPassthrough)
       assert(DataMirror.modulePorts(m) == Seq(
-- 
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