From 3dade9a48f059e3eecc7048bcd1cd1db48cdb56a Mon Sep 17 00:00:00 2001
From: Henry Cook
Date: Fri, 14 Aug 2015 14:28:56 -0700
Subject: more tests

---
 src/test/scala/chiselTests/Direction.scala | 35 ++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)
 create mode 100644 src/test/scala/chiselTests/Direction.scala

(limited to 'src/test/scala/chiselTests/Direction.scala')

diff --git a/src/test/scala/chiselTests/Direction.scala b/src/test/scala/chiselTests/Direction.scala
new file mode 100644
index 00000000..0df035c4
--- /dev/null
+++ b/src/test/scala/chiselTests/Direction.scala
@@ -0,0 +1,35 @@
+package chiselTests
+
+import Chisel._
+import org.scalatest._
+import org.scalatest.prop._
+import Chisel.testers.BasicTester
+
+class DirectionHaver extends Module {
+  val io = new Bundle {
+    val in = UInt(INPUT, 32)
+    val out = UInt(OUTPUT, 32)
+  }
+}
+
+class GoodDirection extends DirectionHaver {
+  io.out := UInt(0)
+}
+
+class BadDirection extends DirectionHaver {
+  io.in := UInt(0)
+}
+
+class DirectionSpec extends ChiselPropSpec {
+
+  //TODO: In Chisel3 these are actually FIRRTL errors. Remove from tests?
+
+  property("Outputs should be assignable") {
+    elaborate(new GoodDirection)
+  }
+
+  property("Inputs should not be assignable") {
+    elaborate(new BadDirection)
+  } 
+
+}
-- 
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