From d675043717593fb7e96fb0f1952debbeb7f20a57 Mon Sep 17 00:00:00 2001 From: Jim Lawson Date: Tue, 21 Jun 2016 09:17:30 -0700 Subject: New Module, IO, Input/Output wrapping. --- src/test/scala/chiselTests/BundleWire.scala | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/test/scala/chiselTests/BundleWire.scala') diff --git a/src/test/scala/chiselTests/BundleWire.scala b/src/test/scala/chiselTests/BundleWire.scala index d2e42fa9..147575e1 100644 --- a/src/test/scala/chiselTests/BundleWire.scala +++ b/src/test/scala/chiselTests/BundleWire.scala @@ -12,10 +12,10 @@ class Coord extends Bundle { } class BundleWire(n: Int) extends Module { - val io = new Bundle { - val in = (new Coord).asInput - val outs = Vec(n, new Coord).asOutput - } + val io = IO(new Bundle { + val in = Input(new Coord) + val outs = Output(Vec(n, new Coord)) + }) val coords = Wire(Vec(n, new Coord)) for (i <- 0 until n) { coords(i) := io.in -- cgit v1.2.3 From 12810b5efe6a8f872fbc1c63cdfb835ca354624f Mon Sep 17 00:00:00 2001 From: Jim Lawson Date: Wed, 6 Jul 2016 09:31:47 -0700 Subject: Update Chisel -> chisel3 references. --- src/test/scala/chiselTests/BundleWire.scala | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/test/scala/chiselTests/BundleWire.scala') diff --git a/src/test/scala/chiselTests/BundleWire.scala b/src/test/scala/chiselTests/BundleWire.scala index d2e42fa9..e5e9fb1a 100644 --- a/src/test/scala/chiselTests/BundleWire.scala +++ b/src/test/scala/chiselTests/BundleWire.scala @@ -1,10 +1,10 @@ // See LICENSE for license details. package chiselTests -import Chisel._ +import chisel3._ import org.scalatest._ import org.scalatest.prop._ -import Chisel.testers.BasicTester +import chisel3.testers.BasicTester class Coord extends Bundle { val x = UInt(width = 32) -- cgit v1.2.3 From 2dce378deda1cc33833eb378c89a1c5415817bae Mon Sep 17 00:00:00 2001 From: Jim Lawson Date: Wed, 20 Jul 2016 14:49:35 -0700 Subject: Distinguish between ?Int.Lit and ?Int.width --- src/test/scala/chiselTests/BundleWire.scala | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/test/scala/chiselTests/BundleWire.scala') diff --git a/src/test/scala/chiselTests/BundleWire.scala b/src/test/scala/chiselTests/BundleWire.scala index 029407dd..2f6322b1 100644 --- a/src/test/scala/chiselTests/BundleWire.scala +++ b/src/test/scala/chiselTests/BundleWire.scala @@ -25,11 +25,11 @@ class BundleWire(n: Int) extends Module { class BundleWireTester(n: Int, x: Int, y: Int) extends BasicTester { val dut = Module(new BundleWire(n)) - dut.io.in.x := UInt(x) - dut.io.in.y := UInt(y) + dut.io.in.x := UInt.Lit(x) + dut.io.in.y := UInt.Lit(y) for (elt <- dut.io.outs) { - assert(elt.x === UInt(x)) - assert(elt.y === UInt(y)) + assert(elt.x === UInt.Lit(x)) + assert(elt.y === UInt.Lit(y)) } stop() } -- cgit v1.2.3 From 1fa57cc3f76bc3e5de7e6b943abe70becdcb2295 Mon Sep 17 00:00:00 2001 From: Jim Lawson Date: Wed, 20 Jul 2016 17:08:55 -0700 Subject: More literal/width rangling. --- src/test/scala/chiselTests/BundleWire.scala | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/test/scala/chiselTests/BundleWire.scala') diff --git a/src/test/scala/chiselTests/BundleWire.scala b/src/test/scala/chiselTests/BundleWire.scala index 2f6322b1..3d3d58f3 100644 --- a/src/test/scala/chiselTests/BundleWire.scala +++ b/src/test/scala/chiselTests/BundleWire.scala @@ -7,8 +7,8 @@ import org.scalatest.prop._ import chisel3.testers.BasicTester class Coord extends Bundle { - val x = UInt(width = 32) - val y = UInt(width = 32) + val x = UInt.width( 32) + val y = UInt.width( 32) } class BundleWire(n: Int) extends Module { -- cgit v1.2.3 From 7aa05590382b0528799ad5e9f1318ce42e409793 Mon Sep 17 00:00:00 2001 From: Jim Lawson Date: Mon, 25 Jul 2016 14:06:51 -0700 Subject: Minimize differences with master. Remove .Lit(x) usage. Undo "private" scope change. Change "firing" back to "fire". Add package level NODIR definition. --- src/test/scala/chiselTests/BundleWire.scala | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/test/scala/chiselTests/BundleWire.scala') diff --git a/src/test/scala/chiselTests/BundleWire.scala b/src/test/scala/chiselTests/BundleWire.scala index 3d3d58f3..0071041c 100644 --- a/src/test/scala/chiselTests/BundleWire.scala +++ b/src/test/scala/chiselTests/BundleWire.scala @@ -25,11 +25,11 @@ class BundleWire(n: Int) extends Module { class BundleWireTester(n: Int, x: Int, y: Int) extends BasicTester { val dut = Module(new BundleWire(n)) - dut.io.in.x := UInt.Lit(x) - dut.io.in.y := UInt.Lit(y) + dut.io.in.x := UInt(x) + dut.io.in.y := UInt(y) for (elt <- dut.io.outs) { - assert(elt.x === UInt.Lit(x)) - assert(elt.y === UInt.Lit(y)) + assert(elt.x === UInt(x)) + assert(elt.y === UInt(y)) } stop() } -- cgit v1.2.3 From 6df3a785f8abe706838bc5b4b35c3374b6512f96 Mon Sep 17 00:00:00 2001 From: Jim Lawson Date: Mon, 29 Aug 2016 12:17:48 -0700 Subject: Pass compileOptions as an implicit Module parameter. --- src/test/scala/chiselTests/BundleWire.scala | 1 + 1 file changed, 1 insertion(+) (limited to 'src/test/scala/chiselTests/BundleWire.scala') diff --git a/src/test/scala/chiselTests/BundleWire.scala b/src/test/scala/chiselTests/BundleWire.scala index 0071041c..c72ad78d 100644 --- a/src/test/scala/chiselTests/BundleWire.scala +++ b/src/test/scala/chiselTests/BundleWire.scala @@ -5,6 +5,7 @@ import chisel3._ import org.scalatest._ import org.scalatest.prop._ import chisel3.testers.BasicTester +import chisel3.Strict.StrictCompileOptions class Coord extends Bundle { val x = UInt.width( 32) -- cgit v1.2.3 From 62817134d222747f1eab34626fe7b1bb13b9f6df Mon Sep 17 00:00:00 2001 From: Jim Lawson Date: Mon, 29 Aug 2016 13:45:05 -0700 Subject: Rename CompileOptions implicit objects. --- src/test/scala/chiselTests/BundleWire.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/test/scala/chiselTests/BundleWire.scala') diff --git a/src/test/scala/chiselTests/BundleWire.scala b/src/test/scala/chiselTests/BundleWire.scala index c72ad78d..15c5d5f8 100644 --- a/src/test/scala/chiselTests/BundleWire.scala +++ b/src/test/scala/chiselTests/BundleWire.scala @@ -5,7 +5,7 @@ import chisel3._ import org.scalatest._ import org.scalatest.prop._ import chisel3.testers.BasicTester -import chisel3.Strict.StrictCompileOptions +import chisel3.Strict.CompileOptions class Coord extends Bundle { val x = UInt.width( 32) -- cgit v1.2.3 From eb5e5dc30019be342b7a0534b425bf33b7984ce3 Mon Sep 17 00:00:00 2001 From: Jim Lawson Date: Thu, 29 Sep 2016 11:44:09 -0700 Subject: Massive rename of CompileOptions. Massage CompileOption names in an attempt to preserve default (Strict) CompileOptions in the absence of explicit imports. NOTE: Since the default is now strict, we may encounter errors when we generate connections for clients (i.e., in Vec.do_apply() when we wire up a sequence). We should really thread the CompileOptions through the macro system so the client's implicits are used. --- src/test/scala/chiselTests/BundleWire.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/test/scala/chiselTests/BundleWire.scala') diff --git a/src/test/scala/chiselTests/BundleWire.scala b/src/test/scala/chiselTests/BundleWire.scala index 15c5d5f8..07360c34 100644 --- a/src/test/scala/chiselTests/BundleWire.scala +++ b/src/test/scala/chiselTests/BundleWire.scala @@ -5,7 +5,7 @@ import chisel3._ import org.scalatest._ import org.scalatest.prop._ import chisel3.testers.BasicTester -import chisel3.Strict.CompileOptions +//import chisel3.ExplicitCompileOptions.Strict class Coord extends Bundle { val x = UInt.width( 32) -- cgit v1.2.3 From 96fb6a5e2c781b20470d02eac186b1b129c20bdf Mon Sep 17 00:00:00 2001 From: Jim Lawson Date: Thu, 29 Sep 2016 14:57:42 -0700 Subject: Consolidate CompileOptions and re-enable NotStrict pending macro work. --- src/test/scala/chiselTests/BundleWire.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/test/scala/chiselTests/BundleWire.scala') diff --git a/src/test/scala/chiselTests/BundleWire.scala b/src/test/scala/chiselTests/BundleWire.scala index 07360c34..53d46e93 100644 --- a/src/test/scala/chiselTests/BundleWire.scala +++ b/src/test/scala/chiselTests/BundleWire.scala @@ -5,7 +5,7 @@ import chisel3._ import org.scalatest._ import org.scalatest.prop._ import chisel3.testers.BasicTester -//import chisel3.ExplicitCompileOptions.Strict +//import chisel3.core.ExplicitCompileOptions.Strict class Coord extends Bundle { val x = UInt.width( 32) -- cgit v1.2.3