From 42de6d9c42730cbce5659e821e9d9e04fe2ce925 Mon Sep 17 00:00:00 2001 From: ducky Date: Wed, 4 Nov 2015 12:58:40 -0800 Subject: Fix new style errors --- src/main/scala/Chisel/Driver.scala | 6 +++--- src/main/scala/Chisel/testers/BasicTester.scala | 2 +- src/main/scala/Chisel/testers/TesterDriver.scala | 6 ++++-- 3 files changed, 8 insertions(+), 6 deletions(-) (limited to 'src/main') diff --git a/src/main/scala/Chisel/Driver.scala b/src/main/scala/Chisel/Driver.scala index 64356b21..dd78ab8d 100644 --- a/src/main/scala/Chisel/Driver.scala +++ b/src/main/scala/Chisel/Driver.scala @@ -55,7 +55,7 @@ trait BackendCompilationUtilities { "--Wno-fatal", "--trace", "-O2", - "+define+TOP_TYPE=V"+prefix, + "+define+TOP_TYPE=V" + prefix, "-CFLAGS", s"""-Wno-undefined-bool-conversion -O2 -DTOP_TYPE=V$prefix -include ${vH.toString}""", "-Mdir", dir.toString, "--exe", cppHarness.toString) @@ -81,14 +81,14 @@ trait BackendCompilationUtilities { object Driver extends FileSystemUtilities with BackendCompilationUtilities { - /** Elaborates the Module specified in the gen function into a Circuit + /** Elaborates the Module specified in the gen function into a Circuit * * @param gen a function that creates a Module hierarchy * * @return the resulting Chisel IR in the form of a Circuit (TODO: Should be FIRRTL IR) */ def elaborate[T <: Module](gen: () => T): Circuit = Builder.build(Module(gen())) - + def emit[T <: Module](gen: () => T): String = elaborate(gen).emit def dumpFirrtl(ir: Circuit, optName: Option[File]): File = { diff --git a/src/main/scala/Chisel/testers/BasicTester.scala b/src/main/scala/Chisel/testers/BasicTester.scala index dbb269bb..398e49e7 100644 --- a/src/main/scala/Chisel/testers/BasicTester.scala +++ b/src/main/scala/Chisel/testers/BasicTester.scala @@ -11,5 +11,5 @@ class BasicTester extends Module { io.done := Bool(false) io.error := UInt(0) - def popCount(n: Long) = n.toBinaryString.count(_=='1') + def popCount(n: Long): Int = n.toBinaryString.count(_=='1') } diff --git a/src/main/scala/Chisel/testers/TesterDriver.scala b/src/main/scala/Chisel/testers/TesterDriver.scala index 657f7d37..d104782a 100644 --- a/src/main/scala/Chisel/testers/TesterDriver.scala +++ b/src/main/scala/Chisel/testers/TesterDriver.scala @@ -27,11 +27,13 @@ object TesterDriver extends BackendCompilationUtilities with FileSystemUtilities Driver.dumpFirrtl(circuit, Some(new File(fname.toString + ".fir"))) // Use sys.Process to invoke a bunch of backend stuff, then run the resulting exe - if(((new File(System.getProperty("user.dir") + "/src/main/resources/top.cpp") #> cppHarness) #&& + if (((new File(System.getProperty("user.dir") + "/src/main/resources/top.cpp") #> cppHarness) #&& firrtlToVerilog(prefix, dir) #&& verilogToCpp(prefix, dir, vDut, cppHarness, vH) #&& cppToExe(prefix, dir)).! == 0) { executeExpectingSuccess(prefix, dir) - } else false + } else { + false + } } } -- cgit v1.2.3