From d408d73a171535bd7c2ba9d0037c194022b8a62f Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Mon, 20 Jun 2016 11:08:46 -0700
Subject: Rename chisel3 package.

---
 src/main/scala/chisel3/util/CircuitMath.scala | 28 +++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)
 create mode 100644 src/main/scala/chisel3/util/CircuitMath.scala

(limited to 'src/main/scala/chisel3/util/CircuitMath.scala')

diff --git a/src/main/scala/chisel3/util/CircuitMath.scala b/src/main/scala/chisel3/util/CircuitMath.scala
new file mode 100644
index 00000000..c3b94fdb
--- /dev/null
+++ b/src/main/scala/chisel3/util/CircuitMath.scala
@@ -0,0 +1,28 @@
+// See LICENSE for license details.
+
+/** Circuit-land math operations.
+  */
+
+package chisel.util
+
+import chisel._
+
+/** Compute Log2 with truncation of a UInt in hardware using a Mux Tree
+  * An alternative interpretation is it computes the minimum number of bits needed to represent x
+  * @example
+  * {{{ data_out := Log2(data_in) }}}
+  * @note Truncation is used so Log2(UInt(12412)) = 13*/
+object Log2 {
+  /** Compute the Log2 on the least significant n bits of x */
+  def apply(x: Bits, width: Int): UInt = {
+    if (width < 2) {
+      UInt(0)
+    } else if (width == 2) {
+      x(1)
+    } else {
+      Mux(x(width-1), UInt(width-1), apply(x, width-1))
+    }
+  }
+
+  def apply(x: Bits): UInt = apply(x, x.getWidth)
+}
-- 
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