From c5f9ea3133ef363ff8944e17d94fea79767b6bed Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Wed, 6 Jul 2016 10:01:23 -0700
Subject: Rename "Chisel" to "chisel3" (only git mv).

---
 src/main/scala/chisel3/package.scala | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)
 create mode 100644 src/main/scala/chisel3/package.scala

(limited to 'src/main/scala/chisel3/package.scala')

diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala
new file mode 100644
index 00000000..f05e8b5d
--- /dev/null
+++ b/src/main/scala/chisel3/package.scala
@@ -0,0 +1,31 @@
+package object Chisel {
+  import scala.language.experimental.macros
+  
+  import internal.firrtl.Width
+  import internal.sourceinfo.{SourceInfo, SourceInfoTransform}
+  
+  implicit class fromBigIntToLiteral(val x: BigInt) extends AnyVal {
+    def U: UInt = UInt(x, Width())
+    def S: SInt = SInt(x, Width())
+  }
+  implicit class fromIntToLiteral(val x: Int) extends AnyVal {
+    def U: UInt = UInt(BigInt(x), Width())
+    def S: SInt = SInt(BigInt(x), Width())
+  }
+  implicit class fromStringToLiteral(val x: String) extends AnyVal {
+    def U: UInt = UInt(x)
+  }
+  implicit class fromBooleanToLiteral(val x: Boolean) extends AnyVal {
+    def B: Bool = Bool(x)
+  }
+  
+  implicit class fromUIntToBitPatComparable(val x: UInt) extends AnyVal {
+    final def === (that: BitPat): Bool = macro SourceInfoTransform.thatArg
+    final def != (that: BitPat): Bool = macro SourceInfoTransform.thatArg
+    final def =/= (that: BitPat): Bool = macro SourceInfoTransform.thatArg
+  
+    def do_=== (that: BitPat)(implicit sourceInfo: SourceInfo): Bool = that === x
+    def do_!= (that: BitPat)(implicit sourceInfo: SourceInfo): Bool = that != x
+    def do_=/= (that: BitPat)(implicit sourceInfo: SourceInfo): Bool = that =/= x
+  }
+}
-- 
cgit v1.2.3


From 12810b5efe6a8f872fbc1c63cdfb835ca354624f Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Wed, 6 Jul 2016 09:31:47 -0700
Subject: Update Chisel -> chisel3 references.

---
 src/main/scala/chisel3/package.scala | 82 ++++++++++++++++++++++++++++++++++--
 1 file changed, 79 insertions(+), 3 deletions(-)

(limited to 'src/main/scala/chisel3/package.scala')

diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala
index f05e8b5d..35bbd1c4 100644
--- a/src/main/scala/chisel3/package.scala
+++ b/src/main/scala/chisel3/package.scala
@@ -1,12 +1,88 @@
-package object Chisel {
+package object chisel3 {
   import scala.language.experimental.macros
-  
+
   import internal.firrtl.Width
   import internal.sourceinfo.{SourceInfo, SourceInfoTransform}
   
   implicit class fromBigIntToLiteral(val x: BigInt) extends AnyVal {
     def U: UInt = UInt(x, Width())
     def S: SInt = SInt(x, Width())
+
+  import util.BitPat
+
+
+  type Direction = chisel3.core.Direction
+  type Data = chisel3.core.Data
+  val Wire = chisel3.core.Wire
+  val Clock = chisel3.core.Clock
+  type Clock = chisel3.core.Clock
+
+  type Aggregate = chisel3.core.Aggregate
+  val Vec = chisel3.core.Vec
+  type Vec[T <: Data] = chisel3.core.Vec[T]
+  type VecLike[T <: Data] = chisel3.core.VecLike[T]
+  type Bundle = chisel3.core.Bundle
+
+  val assert = chisel3.core.assert
+
+  type Element = chisel3.core.Element
+  type Bits = chisel3.core.Bits
+  val Bits = chisel3.core.Bits
+  type Num[T <: Data] = chisel3.core.Num[T]
+  type UInt = chisel3.core.UInt
+  val UInt = chisel3.core.UInt
+  type SInt = chisel3.core.SInt
+  val SInt = chisel3.core.SInt
+  type Bool = chisel3.core.Bool
+  val Bool = chisel3.core.Bool
+  val Mux = chisel3.core.Mux
+
+  type BlackBox = chisel3.core.BlackBox
+
+  val Mem = chisel3.core.Mem
+  type MemBase[T <: Data] = chisel3.core.MemBase[T]
+  type Mem[T <: Data] = chisel3.core.Mem[T]
+  val SeqMem = chisel3.core.SeqMem
+  type SeqMem[T <: Data] = chisel3.core.SeqMem[T]
+
+  val Module = chisel3.core.Module
+  type Module = chisel3.core.Module
+
+  val printf = chisel3.core.printf
+
+  val Reg = chisel3.core.Reg
+
+  val when = chisel3.core.when
+  type WhenContext = chisel3.core.WhenContext
+
+  /**
+  * These implicit classes allow one to convert scala.Int|scala.BigInt to
+  * Chisel.UInt|Chisel.SInt by calling .asUInt|.asSInt on them, respectively.
+  * The versions .asUInt(width)|.asSInt(width) are also available to explicitly
+  * mark a width for the new literal.
+  *
+  * Also provides .asBool to scala.Boolean and .asUInt to String
+  *
+  * Note that, for stylistic reasons, one hould avoid extracting immediately
+  * after this call using apply, ie. 0.asUInt(1)(0) due to potential for
+  * confusion (the 1 is a bit length and the 0 is a bit extraction position).
+  * Prefer storing the result and then extracting from it.
+  */
+  implicit class addLiteraltoScalaInt(val target: Int) extends AnyVal {
+    def asUInt() = UInt.Lit(target)
+    def asSInt() = SInt.Lit(target)
+    def asUInt(width: Int) = UInt.Lit(target, width)
+    def asSInt(width: Int) = SInt.Lit(target, width)
+
+    // These were recently added to chisel2/3 but are not to be used internally
+    @deprecated("asUInt should be used over U", "gchisel")
+    def U() = UInt.Lit(target)
+    @deprecated("asSInt should be used over S", "gchisel")
+    def S() = SInt.Lit(target)
+    @deprecated("asUInt should be used over U", "gchisel")
+    def U(width: Int) = UInt.Lit(target, width)
+    @deprecated("asSInt should be used over S", "gchisel")
+    def S(width: Int) = SInt.Lit(target, width)
   }
   implicit class fromIntToLiteral(val x: Int) extends AnyVal {
     def U: UInt = UInt(BigInt(x), Width())
@@ -23,7 +99,7 @@ package object Chisel {
     final def === (that: BitPat): Bool = macro SourceInfoTransform.thatArg
     final def != (that: BitPat): Bool = macro SourceInfoTransform.thatArg
     final def =/= (that: BitPat): Bool = macro SourceInfoTransform.thatArg
-  
+
     def do_=== (that: BitPat)(implicit sourceInfo: SourceInfo): Bool = that === x
     def do_!= (that: BitPat)(implicit sourceInfo: SourceInfo): Bool = that != x
     def do_=/= (that: BitPat)(implicit sourceInfo: SourceInfo): Bool = that =/= x
-- 
cgit v1.2.3


From 3120eefc8a73b5ab3d8f909445a3e004b5e60cc6 Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Tue, 19 Jul 2016 15:08:22 -0700
Subject: Incorporate connection logic. Compiles but fails tests.

---
 src/main/scala/chisel3/package.scala | 45 +++++++++++++++++++-----------------
 1 file changed, 24 insertions(+), 21 deletions(-)

(limited to 'src/main/scala/chisel3/package.scala')

diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala
index 35bbd1c4..71ec0e92 100644
--- a/src/main/scala/chisel3/package.scala
+++ b/src/main/scala/chisel3/package.scala
@@ -3,15 +3,21 @@ package object chisel3 {
 
   import internal.firrtl.Width
   import internal.sourceinfo.{SourceInfo, SourceInfoTransform}
-  
-  implicit class fromBigIntToLiteral(val x: BigInt) extends AnyVal {
-    def U: UInt = UInt(x, Width())
-    def S: SInt = SInt(x, Width())
 
   import util.BitPat
 
 
   type Direction = chisel3.core.Direction
+  object Input {
+    def apply[T<:Data](target: T): T = chisel3.core.Input(target)
+  }
+  object Output {
+    def apply[T<:Data](target: T): T = chisel3.core.Output(target)
+  }
+  object Flipped {
+    def apply[T<:Data](target: T): T = chisel3.core.Flipped(target)
+  }
+
   type Data = chisel3.core.Data
   val Wire = chisel3.core.Wire
   val Clock = chisel3.core.Clock
@@ -63,30 +69,24 @@ package object chisel3 {
   *
   * Also provides .asBool to scala.Boolean and .asUInt to String
   *
-  * Note that, for stylistic reasons, one hould avoid extracting immediately
+  * Note that, for stylistic reasons, one should avoid extracting immediately
   * after this call using apply, ie. 0.asUInt(1)(0) due to potential for
   * confusion (the 1 is a bit length and the 0 is a bit extraction position).
   * Prefer storing the result and then extracting from it.
   */
-  implicit class addLiteraltoScalaInt(val target: Int) extends AnyVal {
-    def asUInt() = UInt.Lit(target)
-    def asSInt() = SInt.Lit(target)
-    def asUInt(width: Int) = UInt.Lit(target, width)
-    def asSInt(width: Int) = SInt.Lit(target, width)
-
-    // These were recently added to chisel2/3 but are not to be used internally
-    @deprecated("asUInt should be used over U", "gchisel")
-    def U() = UInt.Lit(target)
-    @deprecated("asSInt should be used over S", "gchisel")
-    def S() = SInt.Lit(target)
-    @deprecated("asUInt should be used over U", "gchisel")
-    def U(width: Int) = UInt.Lit(target, width)
-    @deprecated("asSInt should be used over S", "gchisel")
-    def S(width: Int) = SInt.Lit(target, width)
-  }
   implicit class fromIntToLiteral(val x: Int) extends AnyVal {
     def U: UInt = UInt(BigInt(x), Width())
     def S: SInt = SInt(BigInt(x), Width())
+
+    def asUInt() = UInt(x, Width())
+    def asSInt() = SInt(x, Width())
+    def asUInt(width: Int) = UInt(x, width)
+    def asSInt(width: Int) = SInt(x, width)
+  }
+  
+  implicit class fromBigIntToLiteral(val x: BigInt) extends AnyVal {
+    def U: UInt = UInt(x, Width())
+    def S: SInt = SInt(x, Width())
   }
   implicit class fromStringToLiteral(val x: String) extends AnyVal {
     def U: UInt = UInt(x)
@@ -104,4 +104,7 @@ package object chisel3 {
     def do_!= (that: BitPat)(implicit sourceInfo: SourceInfo): Bool = that != x
     def do_=/= (that: BitPat)(implicit sourceInfo: SourceInfo): Bool = that =/= x
   }
+
+  val INPUT = chisel3.core.Direction.Input
+  val OUTPUT = chisel3.core.Direction.Output
 }
-- 
cgit v1.2.3


From 28e80311f172ae4d1d477e8bb47ca3719c9a8fc5 Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Wed, 20 Jul 2016 13:28:15 -0700
Subject: Compile ok. Need to convert UInt(x) into UInt.Lit(x) or UInt.width(x)

---
 src/main/scala/chisel3/package.scala | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

(limited to 'src/main/scala/chisel3/package.scala')

diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala
index 71ec0e92..86fce6a2 100644
--- a/src/main/scala/chisel3/package.scala
+++ b/src/main/scala/chisel3/package.scala
@@ -1,9 +1,10 @@
+// See LICENSE for license details.
+
 package object chisel3 {
   import scala.language.experimental.macros
 
   import internal.firrtl.Width
   import internal.sourceinfo.{SourceInfo, SourceInfoTransform}
-
   import util.BitPat
 
 
@@ -87,6 +88,11 @@ package object chisel3 {
   implicit class fromBigIntToLiteral(val x: BigInt) extends AnyVal {
     def U: UInt = UInt(x, Width())
     def S: SInt = SInt(x, Width())
+
+    def asUInt() = UInt(x, Width())
+    def asSInt() = SInt(x, Width())
+    def asUInt(width: Int) = UInt(x, width)
+    def asSInt(width: Int) = SInt(x, width)
   }
   implicit class fromStringToLiteral(val x: String) extends AnyVal {
     def U: UInt = UInt(x)
-- 
cgit v1.2.3


From 2dce378deda1cc33833eb378c89a1c5415817bae Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Wed, 20 Jul 2016 14:49:35 -0700
Subject: Distinguish between ?Int.Lit and ?Int.width

---
 src/main/scala/chisel3/package.scala | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/main/scala/chisel3/package.scala')

diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala
index 86fce6a2..e43434c0 100644
--- a/src/main/scala/chisel3/package.scala
+++ b/src/main/scala/chisel3/package.scala
@@ -95,7 +95,7 @@ package object chisel3 {
     def asSInt(width: Int) = SInt(x, width)
   }
   implicit class fromStringToLiteral(val x: String) extends AnyVal {
-    def U: UInt = UInt(x)
+    def U: UInt = UInt.Lit(x)
   }
   implicit class fromBooleanToLiteral(val x: Boolean) extends AnyVal {
     def B: Bool = Bool(x)
-- 
cgit v1.2.3


From 50518f43cbd9c783633714a26ecdb0f2f18a1142 Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Mon, 25 Jul 2016 09:19:14 -0700
Subject: Use more idiomatic ScalaTest exception expecting code.

---
 src/main/scala/chisel3/package.scala | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/main/scala/chisel3/package.scala')

diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala
index e43434c0..d47ed890 100644
--- a/src/main/scala/chisel3/package.scala
+++ b/src/main/scala/chisel3/package.scala
@@ -113,4 +113,5 @@ package object chisel3 {
 
   val INPUT = chisel3.core.Direction.Input
   val OUTPUT = chisel3.core.Direction.Output
+  type ChiselException = chisel3.internal.ChiselException
 }
-- 
cgit v1.2.3


From 7aa05590382b0528799ad5e9f1318ce42e409793 Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Mon, 25 Jul 2016 14:06:51 -0700
Subject: Minimize differences with master. Remove .Lit(x) usage. Undo
 "private" scope change. Change "firing" back to "fire". Add package level
 NODIR definition.

---
 src/main/scala/chisel3/package.scala | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src/main/scala/chisel3/package.scala')

diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala
index 9a79b109..774455c4 100644
--- a/src/main/scala/chisel3/package.scala
+++ b/src/main/scala/chisel3/package.scala
@@ -95,7 +95,7 @@ package object chisel3 {
     def asSInt(width: Int) = SInt(x, width)
   }
   implicit class fromStringToLiteral(val x: String) extends AnyVal {
-    def U: UInt = UInt.Lit(x)
+    def U: UInt = UInt(x)
   }
   implicit class fromBooleanToLiteral(val x: Boolean) extends AnyVal {
     def B: Bool = Bool(x)
@@ -113,5 +113,6 @@ package object chisel3 {
 
   val INPUT = chisel3.core.Direction.Input
   val OUTPUT = chisel3.core.Direction.Output
+  val NODIR = chisel3.core.Direction.Unspecified
   type ChiselException = chisel3.internal.ChiselException
 }
-- 
cgit v1.2.3


From 11f119d0aba5ca578f2178cf83ba5096cc26cb22 Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Tue, 26 Jul 2016 08:24:45 -0700
Subject: Add ValidIO definition for old code.

---
 src/main/scala/chisel3/package.scala | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/main/scala/chisel3/package.scala')

diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala
index 774455c4..926ca00d 100644
--- a/src/main/scala/chisel3/package.scala
+++ b/src/main/scala/chisel3/package.scala
@@ -111,8 +111,10 @@ package object chisel3 {
     def do_=/= (that: BitPat)(implicit sourceInfo: SourceInfo): Bool = that =/= x
   }
 
+  // Compatibility with existing code.
   val INPUT = chisel3.core.Direction.Input
   val OUTPUT = chisel3.core.Direction.Output
   val NODIR = chisel3.core.Direction.Unspecified
   type ChiselException = chisel3.internal.ChiselException
+  type ValidIO[+T <: Data] = chisel3.util.Valid[T]
 }
-- 
cgit v1.2.3


From e065416d59871d790cca9d75dc9a40fcc7b52015 Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Wed, 27 Jul 2016 09:13:45 -0700
Subject: Additional compatibility code.

---
 src/main/scala/chisel3/package.scala | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

(limited to 'src/main/scala/chisel3/package.scala')

diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala
index 926ca00d..5fcf5e67 100644
--- a/src/main/scala/chisel3/package.scala
+++ b/src/main/scala/chisel3/package.scala
@@ -7,6 +7,9 @@ package object chisel3 {
   import internal.sourceinfo.{SourceInfo, SourceInfoTransform}
   import util.BitPat
 
+  import chisel3.core.{Binding, Bits, Element, FlippedBinder}
+  import chisel3.util._
+  import chisel3.internal.firrtl.Port
 
   type Direction = chisel3.core.Direction
   object Input {
@@ -117,4 +120,31 @@ package object chisel3 {
   val NODIR = chisel3.core.Direction.Unspecified
   type ChiselException = chisel3.internal.ChiselException
   type ValidIO[+T <: Data] = chisel3.util.Valid[T]
+  val Decoupled = chisel3.util.DecoupledIO
+
+  class EnqIO[+T <: Data](gen: T) extends DecoupledIO(gen) {
+    def init(): Unit = {
+      this.noenq()
+    }
+    override def cloneType: this.type = EnqIO(gen).asInstanceOf[this.type]
+  }
+  class DeqIO[+T <: Data](gen: T) extends DecoupledIO(gen) {
+    Binding.bind(this, FlippedBinder, "Error: Cannot flip ")
+    def init(): Unit = {
+      this.nodeq()
+    }
+    override def cloneType: this.type = DeqIO(gen).asInstanceOf[this.type]
+  }
+  object EnqIO {
+    def apply[T<:Data](gen: T): EnqIO[T] = new EnqIO(gen)
+  }
+  object DeqIO {
+    def apply[T<:Data](gen: T): DeqIO[T] = new DeqIO(gen)
+  }
+
+  // Debugger/Tester access to internal Chisel data structures and methods.
+  def getDataElements(a: Aggregate): Seq[Element] = {
+    a.allElements
+  }
+  def getModulePorts(m: Module): Seq[Port] = m.getPorts
 }
-- 
cgit v1.2.3


From 138329479914ac37b49a5a44841dc1de2929dca5 Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Wed, 27 Jul 2016 10:36:55 -0700
Subject: More compatibility fixes

---
 src/main/scala/chisel3/package.scala | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src/main/scala/chisel3/package.scala')

diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala
index 5fcf5e67..a0264df4 100644
--- a/src/main/scala/chisel3/package.scala
+++ b/src/main/scala/chisel3/package.scala
@@ -7,7 +7,7 @@ package object chisel3 {
   import internal.sourceinfo.{SourceInfo, SourceInfoTransform}
   import util.BitPat
 
-  import chisel3.core.{Binding, Bits, Element, FlippedBinder}
+  import chisel3.core.{Binding, FlippedBinder}
   import chisel3.util._
   import chisel3.internal.firrtl.Port
 
@@ -120,6 +120,7 @@ package object chisel3 {
   val NODIR = chisel3.core.Direction.Unspecified
   type ChiselException = chisel3.internal.ChiselException
   type ValidIO[+T <: Data] = chisel3.util.Valid[T]
+  val ValidIO = chisel3.util.Valid
   val Decoupled = chisel3.util.DecoupledIO
 
   class EnqIO[+T <: Data](gen: T) extends DecoupledIO(gen) {
-- 
cgit v1.2.3


From 94796f5960b5b82f9d28d2b0e0e7ec7c92e29dfa Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Mon, 22 Aug 2016 15:46:28 -0700
Subject: Fix firrtlDirection for class DeqIO.

---
 src/main/scala/chisel3/package.scala | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/main/scala/chisel3/package.scala')

diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala
index fc23f41b..93070f1d 100644
--- a/src/main/scala/chisel3/package.scala
+++ b/src/main/scala/chisel3/package.scala
@@ -124,6 +124,8 @@ package object chisel3 {
     override def cloneType: this.type = EnqIO(gen).asInstanceOf[this.type]
   }
   class DeqIO[+T <: Data](gen: T) extends DecoupledIO(gen) {
+    val Data = chisel3.core.Data
+    Data.setFirrtlDirection(this, Data.getFirrtlDirection(this).flip)
     Binding.bind(this, FlippedBinder, "Error: Cannot flip ")
     def init(): Unit = {
       this.nodeq()
-- 
cgit v1.2.3


From 35c8e40b25f529da883e8ae91644fcc496e087da Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Mon, 22 Aug 2016 16:57:43 -0700
Subject: Purely cosmetic changes to placate the scalastyle checker.

---
 src/main/scala/chisel3/package.scala | 38 ++++++++++++++++++------------------
 1 file changed, 19 insertions(+), 19 deletions(-)

(limited to 'src/main/scala/chisel3/package.scala')

diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala
index 93070f1d..7911cb04 100644
--- a/src/main/scala/chisel3/package.scala
+++ b/src/main/scala/chisel3/package.scala
@@ -1,6 +1,6 @@
 // See LICENSE for license details.
 
-package object chisel3 {
+package object chisel3 {    // scalastyle:ignore package.object.name
   import scala.language.experimental.macros
 
   import internal.firrtl.Width
@@ -73,29 +73,29 @@ package object chisel3 {
   * Prefer storing the result and then extracting from it.
   */
   implicit class fromIntToLiteral(val x: Int) extends AnyVal {
-    def U: UInt = UInt(BigInt(x), Width())
-    def S: SInt = SInt(BigInt(x), Width())
+    def U: UInt = UInt(BigInt(x), Width())    // scalastyle:ignore method.name
+    def S: SInt = SInt(BigInt(x), Width())    // scalastyle:ignore method.name
 
-    def asUInt() = UInt(x, Width())
-    def asSInt() = SInt(x, Width())
-    def asUInt(width: Int) = UInt(x, width)
-    def asSInt(width: Int) = SInt(x, width)
+    def asUInt(): UInt = UInt(x, Width())
+    def asSInt(): SInt = SInt(x, Width())
+    def asUInt(width: Int): UInt = UInt(x, width)
+    def asSInt(width: Int): SInt = SInt(x, width)
   }
-  
+
   implicit class fromBigIntToLiteral(val x: BigInt) extends AnyVal {
-    def U: UInt = UInt(x, Width())
-    def S: SInt = SInt(x, Width())
+    def U: UInt = UInt(x, Width())    // scalastyle:ignore method.name
+    def S: SInt = SInt(x, Width())    // scalastyle:ignore method.name
 
-    def asUInt() = UInt(x, Width())
-    def asSInt() = SInt(x, Width())
-    def asUInt(width: Int) = UInt(x, width)
-    def asSInt(width: Int) = SInt(x, width)
+    def asUInt(): UInt = UInt(x, Width())
+    def asSInt(): SInt = SInt(x, Width())
+    def asUInt(width: Int): UInt = UInt(x, width)
+    def asSInt(width: Int): SInt = SInt(x, width)
   }
   implicit class fromStringToLiteral(val x: String) extends AnyVal {
-    def U: UInt = UInt(x)
+    def U: UInt = UInt(x)    // scalastyle:ignore method.name
   }
   implicit class fromBooleanToLiteral(val x: Boolean) extends AnyVal {
-    def B: Bool = Bool(x)
+    def B: Bool = Bool(x)    // scalastyle:ignore method.name
   }
 
   implicit class fromUIntToBitPatComparable(val x: UInt) extends AnyVal {
@@ -103,9 +103,9 @@ package object chisel3 {
     final def != (that: BitPat): Bool = macro SourceInfoTransform.thatArg
     final def =/= (that: BitPat): Bool = macro SourceInfoTransform.thatArg
 
-    def do_=== (that: BitPat)(implicit sourceInfo: SourceInfo): Bool = that === x
-    def do_!= (that: BitPat)(implicit sourceInfo: SourceInfo): Bool = that != x
-    def do_=/= (that: BitPat)(implicit sourceInfo: SourceInfo): Bool = that =/= x
+    def do_=== (that: BitPat)(implicit sourceInfo: SourceInfo): Bool = that === x    // scalastyle:ignore method.name
+    def do_!= (that: BitPat)(implicit sourceInfo: SourceInfo): Bool = that != x      // scalastyle:ignore method.name
+    def do_=/= (that: BitPat)(implicit sourceInfo: SourceInfo): Bool = that =/= x    // scalastyle:ignore method.name
   }
 
   // Compatibility with existing code.
-- 
cgit v1.2.3


From 6d8acee760c8c41fcae2ab252161bac96e6954dc Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Fri, 16 Sep 2016 09:07:15 -0700
Subject: Rename DecoupledIO object to Decoupled (compatibility).

---
 src/main/scala/chisel3/package.scala | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/main/scala/chisel3/package.scala')

diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala
index 8f01779f..24deb64f 100644
--- a/src/main/scala/chisel3/package.scala
+++ b/src/main/scala/chisel3/package.scala
@@ -167,7 +167,7 @@ package object chisel3 {    // scalastyle:ignore package.object.name
   type ChiselException = chisel3.internal.ChiselException
   type ValidIO[+T <: Data] = chisel3.util.Valid[T]
   val ValidIO = chisel3.util.Valid
-  val Decoupled = chisel3.util.DecoupledIO
+  val DecoupledIO = chisel3.util.Decoupled
 
   class EnqIO[+T <: Data](gen: T) extends DecoupledIO(gen) {
     def init(): Unit = {
-- 
cgit v1.2.3


From 9c88d767e04ac25ab72380c39f30e39c83abf563 Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Wed, 21 Sep 2016 15:22:54 -0700
Subject: Use correct scope for util synonyms.

---
 src/main/scala/chisel3/package.scala | 3 ---
 1 file changed, 3 deletions(-)

(limited to 'src/main/scala/chisel3/package.scala')

diff --git a/src/main/scala/chisel3/package.scala b/src/main/scala/chisel3/package.scala
index 24deb64f..17ddd55a 100644
--- a/src/main/scala/chisel3/package.scala
+++ b/src/main/scala/chisel3/package.scala
@@ -165,9 +165,6 @@ package object chisel3 {    // scalastyle:ignore package.object.name
   val OUTPUT = chisel3.core.Direction.Output
   val NODIR = chisel3.core.Direction.Unspecified
   type ChiselException = chisel3.internal.ChiselException
-  type ValidIO[+T <: Data] = chisel3.util.Valid[T]
-  val ValidIO = chisel3.util.Valid
-  val DecoupledIO = chisel3.util.Decoupled
 
   class EnqIO[+T <: Data](gen: T) extends DecoupledIO(gen) {
     def init(): Unit = {
-- 
cgit v1.2.3