From 5509cdd4c8332c53151e10ba5bdbe0684af1c05b Mon Sep 17 00:00:00 2001
From: Martin Schoeberl
Date: Fri, 25 Jan 2019 23:24:01 -0800
Subject: WireDefault instead of WireInit, keep WireInit around (#986)

---
 src/main/scala/chisel3/compatibility.scala | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'src/main/scala/chisel3/compatibility.scala')

diff --git a/src/main/scala/chisel3/compatibility.scala b/src/main/scala/chisel3/compatibility.scala
index 969a31eb..474058be 100644
--- a/src/main/scala/chisel3/compatibility.scala
+++ b/src/main/scala/chisel3/compatibility.scala
@@ -60,10 +60,10 @@ package object Chisel {     // scalastyle:ignore package.object.name
     import chisel3.core.CompileOptions
 
     def apply[T <: Data](dummy: Int = 0, init: T)(implicit compileOptions: CompileOptions): T =
-      chisel3.core.WireInit(init)
+      chisel3.core.WireDefault(init)
 
     def apply[T <: Data](t: T, init: T)(implicit compileOptions: CompileOptions): T =
-      chisel3.core.WireInit(t, init)
+      chisel3.core.WireDefault(t, init)
   }
   object Clock {
     def apply(): Clock = new Clock
-- 
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