From 69c984607e87cb62c82c99056b2664f11b968267 Mon Sep 17 00:00:00 2001
From: ducky
Date: Wed, 1 Jun 2016 12:46:05 -0700
Subject: Package split chisel core

---
 src/main/scala/chisel/util/Bitwise.scala | 1 +
 src/main/scala/chisel/util/Cat.scala     | 1 +
 src/main/scala/chisel/util/Mux.scala     | 1 +
 3 files changed, 3 insertions(+)

(limited to 'src/main/scala/chisel/util')

diff --git a/src/main/scala/chisel/util/Bitwise.scala b/src/main/scala/chisel/util/Bitwise.scala
index 94413fc7..d7d62ea3 100644
--- a/src/main/scala/chisel/util/Bitwise.scala
+++ b/src/main/scala/chisel/util/Bitwise.scala
@@ -6,6 +6,7 @@
 package chisel.util
 
 import chisel._
+import chisel.core.SeqUtils
 
 object FillInterleaved
 {
diff --git a/src/main/scala/chisel/util/Cat.scala b/src/main/scala/chisel/util/Cat.scala
index 5b3c613e..b47da706 100644
--- a/src/main/scala/chisel/util/Cat.scala
+++ b/src/main/scala/chisel/util/Cat.scala
@@ -3,6 +3,7 @@
 package chisel.util
 
 import chisel._
+import chisel.core.SeqUtils
 
 object Cat {
   /** Combine data elements together
diff --git a/src/main/scala/chisel/util/Mux.scala b/src/main/scala/chisel/util/Mux.scala
index cfff4485..6f074a7e 100644
--- a/src/main/scala/chisel/util/Mux.scala
+++ b/src/main/scala/chisel/util/Mux.scala
@@ -6,6 +6,7 @@
 package chisel.util
 
 import chisel._
+import chisel.core.SeqUtils
 
 /** Builds a Mux tree out of the input signal vector using a one hot encoded
   select signal. Returns the output of the Mux tree.
-- 
cgit v1.2.3