From 70062576bc609b436ae09320565b6ccfa5deb123 Mon Sep 17 00:00:00 2001
From: Andrew Waterman
Date: Thu, 31 Mar 2016 15:35:33 -0700
Subject: Reduce FIRRTL node count for Counter

This would ultimately get DCE'd, but it's easy enough to not
generate the dead code in the first place.
---
 src/main/scala/Chisel/util/Counter.scala | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

(limited to 'src/main/scala/Chisel')

diff --git a/src/main/scala/Chisel/util/Counter.scala b/src/main/scala/Chisel/util/Counter.scala
index 3425b6a2..14f51ec4 100644
--- a/src/main/scala/Chisel/util/Counter.scala
+++ b/src/main/scala/Chisel/util/Counter.scala
@@ -17,7 +17,9 @@ class Counter(val n: Int) {
       Bool(true)
     } else {
       val wrap = value === UInt(n-1)
-      value := Mux(Bool(!isPow2(n)) && wrap, UInt(0), value + UInt(1))
+      value := value + UInt(1)
+      if (!isPow2(n))
+        when (wrap) { value := UInt(0) }
       wrap
     }
   }
-- 
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