From dbd072172f6312893e1922e48ed768ae0fab9a89 Mon Sep 17 00:00:00 2001
From: ducky
Date: Fri, 11 Dec 2015 14:25:42 -0800
Subject: Refactor tests to use stop() and assert() instead of io.error/io.done

Gate assert, printf, stop by reset
Fix testbenches that never worked
Change simulation prints to display cycle at which test was signaled to end, not when simulator stops
Better documentation for Counter
---
 src/main/scala/Chisel/testers/BasicTester.scala | 18 ++++++++++--------
 1 file changed, 10 insertions(+), 8 deletions(-)

(limited to 'src/main/scala/Chisel/testers/BasicTester.scala')

diff --git a/src/main/scala/Chisel/testers/BasicTester.scala b/src/main/scala/Chisel/testers/BasicTester.scala
index fecbe2a9..1079727c 100644
--- a/src/main/scala/Chisel/testers/BasicTester.scala
+++ b/src/main/scala/Chisel/testers/BasicTester.scala
@@ -8,18 +8,20 @@ import internal.Builder.pushCommand
 import firrtl._
 
 class BasicTester extends Module {
-  val io = new Bundle {
-    val done = Bool()
-    val error = UInt(width = 4)
-  }
-  io.done := Bool(false)
-  io.error := UInt(0)
+  // The testbench has no IOs, rather it should communicate using printf, assert, and stop.
+  val io = new Bundle()
 
   def popCount(n: Long): Int = n.toBinaryString.count(_=='1')
 
-  /** Ends the test, reporting success.
+  /** Ends the test reporting success.
+    *
+    * Does not fire when in reset (defined as the encapsulating Module's
+    * reset). If your definition of reset is not the encapsulating Module's
+    * reset, you will need to gate this externally.
     */
   def stop() {
-    pushCommand(Stop(Node(clock), 0))
+    when (!reset) {
+      pushCommand(Stop(Node(clock), 0))
+    }
   }
 }
-- 
cgit v1.2.3