From f9689cab3bbb5cb2cddbb429bc30d630c886034d Mon Sep 17 00:00:00 2001
From: Andrew Waterman
Date: Tue, 5 Apr 2016 15:19:42 -0700
Subject: Make Wire(init = x) behave the same as Wire(t = x) := x

There's a separate debate to be had about whether we want to
default-initialize Wires to invalid.  This patch just fixes the
implementation of the previous, unsafe approach, which was usually,
but not always, defaulting to invalid.
---
 src/main/scala/Chisel/Aggregate.scala | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

(limited to 'src/main/scala/Chisel/Aggregate.scala')

diff --git a/src/main/scala/Chisel/Aggregate.scala b/src/main/scala/Chisel/Aggregate.scala
index 3df48052..6bf656a9 100644
--- a/src/main/scala/Chisel/Aggregate.scala
+++ b/src/main/scala/Chisel/Aggregate.scala
@@ -46,8 +46,7 @@ object Vec {
 
     require(!elts.isEmpty)
     val width = elts.map(_.width).reduce(_ max _)
-    val vec = new Vec(elts.head.cloneTypeWidth(width), elts.length)
-    pushCommand(DefWire(vec))
+    val vec = Wire(new Vec(elts.head.cloneTypeWidth(width), elts.length))
     for ((v, e) <- vec zip elts)
       v := e
     vec
-- 
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