From 7053848724b86d8a1ae4bf00ab416e0aaa35e3f9 Mon Sep 17 00:00:00 2001 From: John Ingalls Date: Mon, 2 Nov 2020 15:12:50 -0800 Subject: SeqUtils asUInt endian-ness: hi/lo instead of right/left (#1647) Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com>--- core/src/main/scala/chisel3/SeqUtils.scala | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'core') diff --git a/core/src/main/scala/chisel3/SeqUtils.scala b/core/src/main/scala/chisel3/SeqUtils.scala index e263810a..f6642bcb 100644 --- a/core/src/main/scala/chisel3/SeqUtils.scala +++ b/core/src/main/scala/chisel3/SeqUtils.scala @@ -26,13 +26,13 @@ private[chisel3] object SeqUtils { } else if (in.tail.isEmpty) { in.head.asUInt } else { - val left = prefix("left") { + val lo = prefix("lo") { asUInt(in.slice(0, in.length/2)) - }.autoSeed("left") - val right = prefix("right") { + }.autoSeed("lo") + val hi = prefix("hi") { asUInt(in.slice(in.length/2, in.length)) - }.autoSeed("right") - right ## left + }.autoSeed("hi") + hi ## lo } } -- cgit v1.2.3