From caf746088b7d92def18f2b3d6ccb7dfd9860e64b Mon Sep 17 00:00:00 2001
From: Aditya Naik
Date: Fri, 31 May 2024 14:15:38 -0700
Subject: 52 errors, removing implicit sourceinfo to clear more errors

---
 core/src/main/scala/chisel3/SIntFactory.scala | 21 ---------------------
 1 file changed, 21 deletions(-)
 delete mode 100644 core/src/main/scala/chisel3/SIntFactory.scala

(limited to 'core/src/main/scala/chisel3/SIntFactory.scala')

diff --git a/core/src/main/scala/chisel3/SIntFactory.scala b/core/src/main/scala/chisel3/SIntFactory.scala
deleted file mode 100644
index 8cceda13..00000000
--- a/core/src/main/scala/chisel3/SIntFactory.scala
+++ /dev/null
@@ -1,21 +0,0 @@
-// SPDX-License-Identifier: Apache-2.0
-
-package chisel3
-
-import chisel3.internal.firrtl.{SLit, Width}
-
-trait SIntFactory {
-
-  /** Create an SInt type with inferred width. */
-  def apply(): SInt = apply(Width())
-
-  /** Create a SInt type or port with fixed width. */
-  def apply(width: Width): SInt = new SInt(width)
-
-  /** Create an SInt literal with specified width. */
-  protected[chisel3] def Lit(value: BigInt, width: Width): SInt = {
-    val lit = SLit(value, width)
-    val result = new SInt(lit.width)
-    lit.bindLitArg(result)
-  }
-}
-- 
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