From 2c53527f6c232121a2340e75c0109c1618fc2428 Mon Sep 17 00:00:00 2001 From: Jack Koenig Date: Wed, 27 Nov 2019 16:29:32 -0800 Subject: Fix bidirectional Wire with Analog (#1252) --- chiselFrontend/src/main/scala/chisel3/experimental/Analog.scala | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'chiselFrontend/src') diff --git a/chiselFrontend/src/main/scala/chisel3/experimental/Analog.scala b/chiselFrontend/src/main/scala/chisel3/experimental/Analog.scala index 2a4aa5f5..37eb578d 100644 --- a/chiselFrontend/src/main/scala/chisel3/experimental/Analog.scala +++ b/chiselFrontend/src/main/scala/chisel3/experimental/Analog.scala @@ -57,10 +57,8 @@ final class Analog private (private[chisel3] val width: Width) extends Element { case SampleElementBinding(parent) => parent.topBinding } - // Analog counts as different directions based on binding context targetTopBinding match { - case WireBinding(_) => direction = ActualDirection.Unspecified // internal wire - case PortBinding(_) => direction = ActualDirection.Bidirectional(ActualDirection.Default) + case _: WireBinding | _: PortBinding => direction = ActualDirection.Bidirectional(ActualDirection.Default) case x => throwException(s"Analog can only be Ports and Wires, not '$x'") } binding = target -- cgit v1.2.3