From 3026dd214f3db3308eaf8f876d0fc03f75c577d3 Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Mon, 20 Jun 2016 11:38:26 -0700
Subject: Rename "package", "import", and explicit references to "chisel3".

---
 .../src/main/scala/chisel3/internal/firrtl/IR.scala          | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

(limited to 'chiselFrontend/src/main/scala/chisel3/internal/firrtl')

diff --git a/chiselFrontend/src/main/scala/chisel3/internal/firrtl/IR.scala b/chiselFrontend/src/main/scala/chisel3/internal/firrtl/IR.scala
index 70e9938b..64d7d5fd 100644
--- a/chiselFrontend/src/main/scala/chisel3/internal/firrtl/IR.scala
+++ b/chiselFrontend/src/main/scala/chisel3/internal/firrtl/IR.scala
@@ -1,11 +1,11 @@
 // See LICENSE for license details.
 
-package chisel.internal.firrtl
+package chisel3.internal.firrtl
 
-import chisel._
+import chisel3._
 import core._
-import chisel.internal._
-import chisel.internal.sourceinfo.{SourceInfo, NoSourceInfo}
+import chisel3.internal._
+import chisel3.internal.sourceinfo.{SourceInfo, NoSourceInfo}
 
 case class PrimOp(val name: String) {
   override def toString: String = name
@@ -55,8 +55,8 @@ case class Node(id: HasId) extends Arg {
 }
 
 abstract class LitArg(val num: BigInt, widthArg: Width) extends Arg {
-  private[chisel] def forcedWidth = widthArg.known
-  private[chisel] def width: Width = if (forcedWidth) widthArg else Width(minWidth)
+  private[chisel3] def forcedWidth = widthArg.known
+  private[chisel3] def width: Width = if (forcedWidth) widthArg else Width(minWidth)
 
   protected def minWidth: Int
   if (forcedWidth) {
-- 
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