From 471a9e2d15d4c968fc6eca9a86c232c6c9c9322d Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Thu, 18 Aug 2016 15:26:39 -0700
Subject: Add assumeNoDirectionIsOutput.

---
 chiselFrontend/src/main/scala/chisel3/internal/CompileOptions.scala | 1 +
 1 file changed, 1 insertion(+)

(limited to 'chiselFrontend/src/main/scala/chisel3/internal/CompileOptions.scala')

diff --git a/chiselFrontend/src/main/scala/chisel3/internal/CompileOptions.scala b/chiselFrontend/src/main/scala/chisel3/internal/CompileOptions.scala
index e040201b..912184fb 100644
--- a/chiselFrontend/src/main/scala/chisel3/internal/CompileOptions.scala
+++ b/chiselFrontend/src/main/scala/chisel3/internal/CompileOptions.scala
@@ -19,4 +19,5 @@ class CompileOptions(optionsMap: Map[String, String]) {
   val portDeterminesDirection: Boolean = optionsMap.getOrElse("portDeterminesDirection", looseDefault).toBoolean
   val tryConnectionsSwapped: Boolean = optionsMap.getOrElse("tryConnectionsSwapped", looseDefault).toBoolean
   val assumeLHSIsOutput: Boolean = optionsMap.getOrElse("assumeLHSIsOutput", looseDefault).toBoolean
+  val assumeNoDirectionIsOutput: Boolean = optionsMap.getOrElse("assumeNoDirectionIsOutput", looseDefault).toBoolean
 }
-- 
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