From bc05b7dadbd875c5a1ffb1448c36fcdb429386ab Mon Sep 17 00:00:00 2001
From: Jack Koenig
Date: Sun, 2 Apr 2017 18:29:17 -0700
Subject: Make Module instantiations draw clock from Builder instead of parent
 (#568)

Fixes #567---
 chiselFrontend/src/main/scala/chisel3/core/Module.scala | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'chiselFrontend/src/main/scala/chisel3/core')

diff --git a/chiselFrontend/src/main/scala/chisel3/core/Module.scala b/chiselFrontend/src/main/scala/chisel3/core/Module.scala
index 1388fb80..b838eb05 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/Module.scala
+++ b/chiselFrontend/src/main/scala/chisel3/core/Module.scala
@@ -190,8 +190,8 @@ extends HasId {
     _parent match {
       case Some(p) => {
         pushCommand(DefInvalid(sourceInfo, io.ref)) // init instance inputs
-        clock := override_clock.getOrElse(p.clock)
-        reset := override_reset.getOrElse(p.reset)
+        clock := override_clock.getOrElse(Builder.forcedClock)
+        reset := override_reset.getOrElse(Builder.forcedReset)
         this
       }
       case None => this
-- 
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