From 48e30fab101c5552c73fc5a76cad3ccc6b38946f Mon Sep 17 00:00:00 2001
From: ducky64
Date: Wed, 22 Nov 2017 22:26:09 -0800
Subject: Support for inner classes, implicit parameter lists, supertypess

---
 chiselFrontend/src/main/scala/chisel3/core/UserModule.scala | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'chiselFrontend/src/main/scala/chisel3/core/UserModule.scala')

diff --git a/chiselFrontend/src/main/scala/chisel3/core/UserModule.scala b/chiselFrontend/src/main/scala/chisel3/core/UserModule.scala
index ac87eda5..9c923037 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/UserModule.scala
+++ b/chiselFrontend/src/main/scala/chisel3/core/UserModule.scala
@@ -151,8 +151,8 @@ abstract class LegacyModule(implicit moduleCompileOptions: CompileOptions)
   def io: Record
 
   // Allow access to bindings from the compatibility package
-  protected def _compatIoPortBound() = portsContains(io)
-  
+  protected def _ioPortBound() = portsContains(io)
+
   protected override def nameIds(rootClass: Class[_]): HashMap[HasId, String] = {
     val names = super.nameIds(rootClass)
 
@@ -165,7 +165,7 @@ abstract class LegacyModule(implicit moduleCompileOptions: CompileOptions)
   }
 
   private[core] override def generateComponent(): Component = {
-    _compatAutoWrapPorts()  // pre-IO(...) compatibility hack
+    _autoWrapPorts()  // pre-IO(...) compatibility hack
 
     // Restrict IO to just io, clock, and reset
     require(io != null, "Module must have io")
-- 
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