From ab951049c2c60402e2318ba863520d4a16c8288d Mon Sep 17 00:00:00 2001
From: Albert Chen
Date: Mon, 26 Nov 2018 09:47:28 -0800
Subject: Trim Stack Trace (#931)

- Trim stack trace to show better, reduced information to the user
- Add --full-stacktrace to FIRRTL option to show full stack trace---
 chiselFrontend/src/main/scala/chisel3/core/Attach.scala | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'chiselFrontend/src/main/scala/chisel3/core/Attach.scala')

diff --git a/chiselFrontend/src/main/scala/chisel3/core/Attach.scala b/chiselFrontend/src/main/scala/chisel3/core/Attach.scala
index edc0a7c9..b3096fd5 100644
--- a/chiselFrontend/src/main/scala/chisel3/core/Attach.scala
+++ b/chiselFrontend/src/main/scala/chisel3/core/Attach.scala
@@ -9,7 +9,7 @@ import chisel3.internal.sourceinfo.{SourceInfo}
 
 object attach {  // scalastyle:ignore object.name
   // Exceptions that can be generated by attach
-  case class AttachException(message: String) extends Exception(message)
+  case class AttachException(message: String) extends ChiselException(message)
   def ConditionalAttachException =
     AttachException(": Conditional attach is not allowed!")
 
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