From fddb5943b1d36925a5435d327c3312572e98ca58 Mon Sep 17 00:00:00 2001 From: Adam Izraelevitz Date: Mon, 12 Aug 2019 15:49:42 -0700 Subject: Aspect-Oriented Programming for Chisel (#1077) Added Aspects to Chisel, enabling a mechanism for dependency injection to hardware modules.--- .../src/main/scala/chisel3/aop/Aspect.scala | 40 ++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 chiselFrontend/src/main/scala/chisel3/aop/Aspect.scala (limited to 'chiselFrontend/src/main/scala/chisel3/aop') diff --git a/chiselFrontend/src/main/scala/chisel3/aop/Aspect.scala b/chiselFrontend/src/main/scala/chisel3/aop/Aspect.scala new file mode 100644 index 00000000..86f5b347 --- /dev/null +++ b/chiselFrontend/src/main/scala/chisel3/aop/Aspect.scala @@ -0,0 +1,40 @@ +// See LICENSE for license details. + +package chisel3.aop + +import chisel3.experimental.RawModule +import firrtl.annotations.{Annotation, NoTargetAnnotation} +import firrtl.options.Unserializable +import firrtl.AnnotationSeq + +/** Represents an aspect of a Chisel module, by specifying + * what behavior should be done to instance, via the FIRRTL Annotation Mechanism + * @tparam T Type of top-level module + */ +abstract class Aspect[T <: RawModule] extends Annotation with Unserializable with NoTargetAnnotation { + /** Convert this Aspect to a seq of FIRRTL annotation + * @param top + * @return + */ + def toAnnotation(top: T): AnnotationSeq + + /** Called by [[chisel3.stage.phases.AspectPhase]] to resolve this Aspect into annotations + * @param top + * @return + */ + private[chisel3] def resolveAspect(top: RawModule): AnnotationSeq = { + toAnnotation(top.asInstanceOf[T]) + } +} + +/** Holds utility functions for Aspect stuff */ +object Aspect { + + /** Converts elaborated Chisel components to FIRRTL modules + * @param chiselIR + * @return + */ + def getFirrtl(chiselIR: chisel3.internal.firrtl.Circuit): firrtl.ir.Circuit = { + chisel3.internal.firrtl.Converter.convert(chiselIR) + } +} -- cgit v1.2.3