From a689c7c0dd336fe0b9db6171786993b190a700f8 Mon Sep 17 00:00:00 2001
From: mergify[bot]
Date: Wed, 8 Jun 2022 20:09:45 +0000
Subject: Added migration for inferModuleReset (#2571) (#2573)

Co-authored-by: Jack Koenig <koenig@sifive.com>
(cherry picked from commit 3c6c044b6bdee850ad9ba375324abaf3813c557d)

Co-authored-by: Adam Izraelevitz <adam.izraelevitz@sifive.com>---
 core/src/main/scala/chisel3/CompileOptions.scala   |  3 ++
 core/src/main/scala/chisel3/Module.scala           |  9 +++++
 .../chiselTests/MigrateCompileOptionsSpec.scala    | 43 ++++++++++++++++++++++
 3 files changed, 55 insertions(+)
 create mode 100644 src/test/scala/chiselTests/MigrateCompileOptionsSpec.scala

diff --git a/core/src/main/scala/chisel3/CompileOptions.scala b/core/src/main/scala/chisel3/CompileOptions.scala
index db773d6e..2764b652 100644
--- a/core/src/main/scala/chisel3/CompileOptions.scala
+++ b/core/src/main/scala/chisel3/CompileOptions.scala
@@ -22,6 +22,9 @@ trait CompileOptions {
   val explicitInvalidate: Boolean
   // Should the reset type of Module be a Bool or a Reset
   val inferModuleReset: Boolean
+
+  /** If marked true, then any Module which consumes `inferModuleReset=false` must also mix in [[RequireSyncReset]] */
+  def migrateInferModuleReset: Boolean = false
 }
 
 object CompileOptions {
diff --git a/core/src/main/scala/chisel3/Module.scala b/core/src/main/scala/chisel3/Module.scala
index 3382cd1b..08286ed5 100644
--- a/core/src/main/scala/chisel3/Module.scala
+++ b/core/src/main/scala/chisel3/Module.scala
@@ -141,6 +141,15 @@ abstract class Module(implicit moduleCompileOptions: CompileOptions) extends Raw
     // Top module and compatibility mode use Bool for reset
     // Note that a Definition elaboration will lack a parent, but still not be a Top module
     val inferReset = (_parent.isDefined || Builder.inDefinition) && moduleCompileOptions.inferModuleReset
+    if (moduleCompileOptions.migrateInferModuleReset && !moduleCompileOptions.inferModuleReset) {
+      this match {
+        case _: RequireSyncReset => // Good! It's been migrated.
+        case _ => // Bad! It hasn't been migrated.
+          Builder.error(
+            s"$desiredName is not inferring its module reset, but has not been marked `RequireSyncReset`. Please extend this trait."
+          )
+      }
+    }
     if (inferReset) Reset() else Bool()
   }
 
diff --git a/src/test/scala/chiselTests/MigrateCompileOptionsSpec.scala b/src/test/scala/chiselTests/MigrateCompileOptionsSpec.scala
new file mode 100644
index 00000000..3757c360
--- /dev/null
+++ b/src/test/scala/chiselTests/MigrateCompileOptionsSpec.scala
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: Apache-2.0
+
+package chiselTests
+
+import chisel3.stage.ChiselStage
+
+import org.scalatestplus.scalacheck.ScalaCheckDrivenPropertyChecks
+
+class MigrateCompileOptionsSpec extends ChiselFlatSpec with ScalaCheckDrivenPropertyChecks with Utils {
+  import Chisel.{defaultCompileOptions => _, _}
+  import chisel3.RequireSyncReset
+
+  behavior.of("Migrating infer resets")
+
+  val migrateIR = new chisel3.CompileOptions {
+    val connectFieldsMustMatch = false
+    val declaredTypeMustBeUnbound = false
+    val dontTryConnectionsSwapped = false
+    val dontAssumeDirectionality = false
+    val checkSynthesizable = false
+    val explicitInvalidate = false
+    val inferModuleReset = false
+
+    override val migrateInferModuleReset = true
+  }
+
+  it should "error if migrating, but not extended RequireSyncReset" in {
+    implicit val options = migrateIR
+    class Foo extends Module {
+      val io = new Bundle {}
+    }
+    intercept[Exception] {
+      ChiselStage.elaborate(new Foo)
+    }
+  }
+  it should "not error if migrating, and you mix with RequireSyncReset" in {
+    implicit val options = migrateIR
+    class Foo extends Module with RequireSyncReset {
+      val io = new Bundle {}
+    }
+    ChiselStage.elaborate(new Foo)
+  }
+}
-- 
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