From 4ef91c4c43d6ab808e79edd239062f919a5bbbe3 Mon Sep 17 00:00:00 2001 From: Schuyler Eldridge Date: Mon, 16 Dec 2019 15:07:55 -0500 Subject: Remove unused WriteEmitted phase (#1273) This removes a dead line where a WriteEmitted phase is constructed. Signed-off-by: Schuyler Eldridge --- src/main/scala/chisel3/stage/package.scala | 1 - 1 file changed, 1 deletion(-) diff --git a/src/main/scala/chisel3/stage/package.scala b/src/main/scala/chisel3/stage/package.scala index 67d38ae7..57766be6 100644 --- a/src/main/scala/chisel3/stage/package.scala +++ b/src/main/scala/chisel3/stage/package.scala @@ -28,7 +28,6 @@ package object stage { private[chisel3] implicit object ChiselExecutionResultView extends OptionsView[ChiselExecutionResult] { - lazy val dummyWriteEmitted = new firrtl.stage.phases.WriteEmitted lazy val dummyConvert = new Convert lazy val dummyEmitter = new Emitter -- cgit v1.2.3 From 98a6710cc0447d79cbd12271ea450c70e619b6f8 Mon Sep 17 00:00:00 2001 From: Jim Lawson Date: Tue, 17 Dec 2019 12:41:36 -0800 Subject: Band aid until litOption is implemented for Aggregates. (#1277) This is just a band aid until an Aggregate `isLit()` method (for which work has begun) is implemented.--- chiselFrontend/src/main/scala/chisel3/Aggregate.scala | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/chiselFrontend/src/main/scala/chisel3/Aggregate.scala b/chiselFrontend/src/main/scala/chisel3/Aggregate.scala index 42b40ed9..8141fdba 100644 --- a/chiselFrontend/src/main/scala/chisel3/Aggregate.scala +++ b/chiselFrontend/src/main/scala/chisel3/Aggregate.scala @@ -43,7 +43,7 @@ sealed abstract class Aggregate extends Data { } } - override def litOption: Option[BigInt] = ??? // TODO implement me + override def litOption: Option[BigInt] = None // TODO implement me /** Returns a Seq of the immediate contents of this Aggregate, in order. */ -- cgit v1.2.3