From 891e5520c846d97fb219bae79251ba792232d99f Mon Sep 17 00:00:00 2001 From: Desire Kaleba Date: Thu, 21 Oct 2021 20:17:30 +0300 Subject: Add Scastie links (#2185) (#2189) * add scastie links (#2185) * add scastie version (#2185) Co-authored-by: Megan Wachs --- .github/ISSUE_TEMPLATE.md | 2 +- README.md | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/.github/ISSUE_TEMPLATE.md b/.github/ISSUE_TEMPLATE.md index d08788de..b2ce0915 100644 --- a/.github/ISSUE_TEMPLATE.md +++ b/.github/ISSUE_TEMPLATE.md @@ -13,7 +13,7 @@ Please select the item best describing the issue in each category and delete the **Development Phase**: request | proposal **Other information** - + **If the current behavior is a bug, please provide the steps to reproduce the problem:** diff --git a/README.md b/README.md index 1a780302..0a06df48 100644 --- a/README.md +++ b/README.md @@ -138,6 +138,7 @@ These simulation-based verification tools are available for Chisel: - [**ScalaDoc**](https://www.chisel-lang.org/api/latest/chisel3/index.html), a listing, description, and examples of the functionality exposed by Chisel - [**Gitter**](https://gitter.im/freechipsproject/chisel3), where you can ask questions or discuss anything Chisel - [**Website**](https://www.chisel-lang.org) ([source](https://github.com/freechipsproject/www.chisel-lang.org/)) +- [**Scastie (3.5.0-RC1)**](https://scastie.scala-lang.org/KtzZQ3nFTea9KoNh0tRqtg) - [**asic-world**](http://www.asic-world.com/verilog/veritut.html) If you aren't familiar with verilog, this is a good tutorial. If you are migrating from Chisel2, see [the migration guide](https://www.chisel-lang.org/chisel3/chisel3-vs-chisel2.html). -- cgit v1.2.3