From 87d69afd1c8f28d91c78e7a539f6bf7a908e2a1f Mon Sep 17 00:00:00 2001
From: Jim Lawson
Date: Wed, 27 Jul 2016 09:35:02 -0700
Subject: Correct EnqIO/DeqIO Flipped-ness.

---
 src/main/scala/chisel3/util/Decoupled.scala | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/main/scala/chisel3/util/Decoupled.scala b/src/main/scala/chisel3/util/Decoupled.scala
index 3ee363a2..0d000f49 100644
--- a/src/main/scala/chisel3/util/Decoupled.scala
+++ b/src/main/scala/chisel3/util/Decoupled.scala
@@ -76,9 +76,9 @@ object DeqIO {
 class QueueIO[T <: Data](gen: T, entries: Int) extends Bundle
 {
   /** I/O to enqueue data, is [[Chisel.DecoupledIO]] flipped */
-  val enq = EnqIO(gen)
+  val enq = DeqIO(gen)
   /** I/O to enqueue data, is [[Chisel.DecoupledIO]]*/
-  val deq = DeqIO(gen)
+  val deq = EnqIO(gen)
   /** The current amount of data in the queue */
   val count = Output(UInt.width(log2Up(entries + 1)))
 }
-- 
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