| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2016-09-09 | Convert to NotStrict for internal connection checks. | Jim Lawson | |
| 2016-09-08 | Add IrrevocableIO alternative to DecoupledIO (#274) | Henry Cook | |
| Add IrrevocableIO subclass of DecoupledIO that promises not to change .bits on a cycle after .valid is high and .ready is low | |||
| 2016-09-07 | Fix bug in Printable FullName of submodule port | jackkoenig | |
| Printable was using HasId.instanceName to get full names of Chisel nodes. instanceName uses the parent module of the HasId to get the Component to use in calling fullName on the underlying Ref. Unfortunately this means that any reference to a port of a instance will leave off the instance name. Fixing this required the following: - Add Component argument to Printable.unpack so that we can call Arg.fullName directly in the Printable - Pass the currently emitting module as the Component to Printable.unpack in the Emitter - Remove ability to create FullName Printables from Modules since the Module name is not known until after the printf is already emitted This commit also updates the PrintableSpec test to check that FullName and Decimal printing work on ports of instances | |||
| 2016-09-07 | Add Printable (#270) | Jack Koenig | |
| Printable is a new type that changes how printing of Chisel types is represented It uses an ordered collection rather than a format string and specifiers Features: - Custom String Interpolator for Scala-like printf - String-like manipulation of "hardware strings" for custom pretty-printing - Default pretty-printing for Chisel data types | |||
| 2016-09-06 | Verify we can suppress the inclusion of default compileOptions. | Jim Lawson | |
| 2016-09-02 | Rename implicit compileOptions to defaultCompileOptions. | Jim Lawson | |
| 2016-09-01 | Move connection implicits from Module constructor to connection methods. | Jim Lawson | |
| Eliminate builder compileOptions. | |||
| 2016-08-30 | Merge branch 'master' into gsdt | Jim Lawson | |
| 2016-08-30 | Make compileOptions in the Chisel package effective. | Jim Lawson | |
| Remove references to the Chisel package in favor of explicit chisel3 imports in tests, | |||
| 2016-08-30 | Explicitly clone the target type in noenq() to avoid "already bound" errors ↵ | Jim Lawson | |
| for io ports. | |||
| 2016-08-30 | Add example of specific CompileOptions settings to tests. | Jim Lawson | |
| 2016-08-30 | Add abstract classes with explicit connection checking options. | Jim Lawson | |
| 2016-08-30 | Allow compileOptions as optional arguments to elaborate() and emit(). | Jim Lawson | |
| 2016-08-30 | Correct parameter name (topModule) in ScalaDoc. | Jim Lawson | |
| 2016-08-29 | Check module-specific compile options. | Jim Lawson | |
| Import chisel3.NotStrict.CompileOptions in Chisel package. Add CompileOptions tests. | |||
| 2016-08-29 | Rename CompileOptions implicit objects. | Jim Lawson | |
| 2016-08-29 | Pass compileOptions as an implicit Module parameter. | Jim Lawson | |
| 2016-08-25 | fix a bug in setModName | Donggyu Kim | |
| 2016-08-24 | Per Chisel meeting. | chick | |
| signalName -> instanceName SignalId -> InstanceId Based on Stephen's comments on PR | |||
| 2016-08-22 | Purely cosmetic changes to placate the scalastyle checker. | Jim Lawson | |
| 2016-08-22 | Fix firrtlDirection for class DeqIO. | Jim Lawson | |
| 2016-08-21 | AnnotatingExample: | chick | |
| Removed extraneous logic Renamed doStuff to buildAnnotatedCircuit Removed println's | |||
| 2016-08-21 | Add AnnotationSpec file which provides an example of a way to implement ↵ | chick | |
| generation of annotations in a chisel circuit that could be used by custom firrtl passes This spec also shows and tests in a limited way the new API of .signalName, .pathName, parentModName which allows access to the various path information of a chisel component (something that subclasses SignalId, most prominently SubClasses of Data and Module | |||
| 2016-08-21 | Add annotating example to test new signal name api | chick | |
| 2016-08-21 | provides signal name methods for firrtl annotation and chisel testers | Donggyu Kim | |
| * signalName: returns the chirrtl name of the signal * pathName: returns the full path name of the signal from the top module * parentPathName: returns the full path of the signal's parent module instance from the top module * parentModName: returns the signal's parent **module(not instance)** name. | |||
| 2016-08-18 | Merge branch 'sdtwigg_connectwrap_renamechisel3' into gsdt_tests | Jim Lawson | |
| Revive support for firrtl flip direction. Remove compileOptions.internalConnectionToInputOk | |||
| 2016-08-17 | Reduce rocket-chip elaboration errors. | Jim Lawson | |
| 2016-08-16 | Merge branch 'master' into sdtwigg_connectwrap_renamechisel3 | Jim Lawson | |
| 2016-08-15 | Make "def width" a private API; expose isWidthKnown instead (#257) | Andrew Waterman | |
| * Make "def width" a private API; expose isWidthKnown instead Resolves #256. Since width was used to determine whether getWidth would succeed, I added def isWidthKnown: Boolean but another option would be to expose something like def widthOption: Option[Int] ...thoughts? * Document getWidth/isWidthKnown * Add widthOption for more idiomatic Scala manipulation of widths | |||
| 2016-08-11 | Merge branch 'master' into sdtwigg_connectwrap_renamechisel3 | Jim Lawson | |
| 2016-08-09 | Support Module name overrides with "override def desiredName" | Andrew Waterman | |
| The API allowed this before, but not safely, as users could create name conflicts. This exposes the pre-deduplication/sanitization naming API, and closes the other one. | |||
| 2016-08-09 | counter(inc,n) example should reflect actual use (#252) | Colin Schmidt | |
| 2016-08-03 | Merge branch 'master' into sdtwigg_connectwrap_renamechisel3 | Jim Lawson | |
| 2016-08-03 | Merge "package" code into "compatibility". | Jim Lawson | |
| 2016-07-31 | Remove deprecated FileSystemUtilities | Andrew Waterman | |
| This has been deprecated for a long time now (and really shouldn't have existed to begin with). | |||
| 2016-07-31 | Fix two deprecation warnings | Andrew Waterman | |
| 2016-07-28 | Add missing Decoupled object pointer. | Jim Lawson | |
| 2016-07-27 | More compatibility fixes | Jim Lawson | |
| 2016-07-27 | Correct EnqIO/DeqIO Flipped-ness. | Jim Lawson | |
| 2016-07-27 | Correct EnqIO/DeqIO Flipped-ness. | Jim Lawson | |
| 2016-07-27 | Additional compatibility code. | Jim Lawson | |
| 2016-07-27 | Correct EnqIO/DeqIO Flipped-ness. | Jim Lawson | |
| 2016-07-27 | Correct EnqIO/DeqIO Flipped-ness. | Jim Lawson | |
| 2016-07-26 | Add ValidIO definition for old code. | Jim Lawson | |
| 2016-07-25 | Enable current (chisel2-style) compatibility mode. | Jim Lawson | |
| 2016-07-25 | Minimize differences with master. | Jim Lawson | |
| Remove .Lit(x) usage. Undo "private" scope change. Change "firing" back to "fire". Add package level NODIR definition. | |||
| 2016-07-25 | Merge branch 'master' into sdtwigg_connectwrap_renamechisel3 | Jim Lawson | |
| 2016-07-25 | Use more idiomatic ScalaTest exception expecting code. | Jim Lawson | |
| 2016-07-25 | Add missing compatibility.scala. | Jim Lawson | |
| 2016-07-25 | catch Bad connection exception | Jim Lawson | |
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