| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2023-11-23 | cleanup | Aditya Naik | |
| 2022-08-31 | Wires should have source location information in firrtl (#2714) (#2716) | mergify[bot] | |
| - Remove line defeating having wire locators `implicit val noSourceInfo = UnlocatableSourceInfo` from `WireDefault#apply` - Add test to show locators (cherry picked from commit f701a9f8151891e3bf9019cd3229cb3f2cd1833b) Co-authored-by: Chick Markley <chick.markley@sifive.com> | |||
| 2020-10-01 | Move Chisel3 to SPDX license conventions (#1604) | Chick Markley | |
| Change source and other relevant files to use SPDX license LICENSE file moved from src/ to ./ Changed license file to refer to this per recommendation using_spdx_license_list_short_identifiers WARNING: Tests fail with as of yet undiagnosed error ``` [error] Failed: Total 691, Failed 19, Errors 0, Passed 672, Ignored 15 [error] Failed tests: [error] chiselTests.QueueSpec [error] examples.VendingMachineGeneratorSpec [error] chiselTests.HarnessSpec [error] chiselTests.ConnectSpec [error] chiselTests.aop.SelectSpec [error] chiselTests.PopCountSpec [error] chiselTests.CloneModuleSpec [error] (Test / test) sbt.TestsFailedException: Tests unsuccessful [error] Total time: 379 s (06:19), completed Sep 30, 2020 12:38:17 AM sbt:chisel3> ``` | |||
| 2019-01-25 | WireDefault instead of WireInit, keep WireInit around (#986) | Martin Schoeberl | |
| 2017-12-19 | Add WireInit.apply that accepts DontCare (#731) | Jack Koenig | |
| Prevents DontCare from affecting type inference Fixes #728 | |||
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index : chiselX | |
| Chisel with SFC compatibility |
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