chiselX - Chisel with SFC compatibility

Age	Commit message (Collapse)	Author
2021-08-23	Remove chisel3's own firrtl Emitter, use firrtl Serializer	Jack Koenig
	This will be slightly slower as it involves converting from Chisel modules to FIRRTL modules before turning them into Strings. This cost is somewhat mitigated by doing that conversion lazily such that we never materialize the entire firrtl Circuit in memory, only 1 module at a time.
2021-04-27	Introduce VecLiterals (#1834)	Chick Markley
	This PR provides for support for Vec literals. They can be one of two forms Inferred: ``` Vec.Lit(0x1.U, 0x2.U) ``` or explicit: ``` Vec(2, UInt(4.W)).Lit(0 -> 0x1.U, 1 -> 0x2.U) ``` - Explicit form allows for partial, or sparse, literals. - Vec literals can be used as Register initializers - Arbitrary nesting (consistent with type constraints is allowed)