| Age | Commit message (Expand) | Author |
| 2015-08-05 | minor cleanup | Henry Cook |
| 2015-08-05 | Massive Driver simplification, some tweaks to Parameter api | Henry Cook |
| 2015-08-05 | add AdvTester | Henry Cook |
| 2015-08-05 | Remove all references to Backends, only backend is FIRRTL | Henry Cook |
| 2015-08-05 | normalize file capitalization | Henry Cook |
| 2015-08-05 | clean up Emitter a bit | Andrew Waterman |
| 2015-08-05 | Use Width object, not Int | Andrew Waterman |
| 2015-08-04 | Vecs are homogeneous, so implement them as such | Andrew Waterman |
| 2015-08-04 | Clean up Mux | Andrew Waterman |
| 2015-08-04 | Fix inferred width of Reverse | Andrew Waterman |
| 2015-08-04 | Fix Fill on Bool | Andrew Waterman |
| 2015-08-04 | Reg(init=UInt(0,N)) should force Reg width to N | Andrew Waterman |
| 2015-08-04 | Refactor Bundle field enumeration | Andrew Waterman |
| 2015-08-04 | Add better cloneTypeWidth and deprecate old one | Andrew Waterman |
| 2015-08-04 | Don't create zero-width Enums, at least for now | Andrew Waterman |
| 2015-08-03 | improve macro hygiene | Henry Cook |
| 2015-08-03 | Improve type-safety of switch/is blocks using macros and SwitchContext. Remov... | Henry Cook |
| 2015-08-03 | Fix << width bug | Andrew Waterman |
| 2015-08-03 | Don't zero-initialize for Wire(init=...) | Andrew Waterman |
| 2015-08-03 | No more shitballs | Andrew Waterman |
| 2015-08-02 | shitballs | Andrew Waterman |
| 2015-08-02 | Move comparison operators to UInt/SInt | Andrew Waterman |
| 2015-08-02 | Remove legacy Params stuff | Andrew Waterman |
| 2015-08-02 | soften permissions on dirVar | Henry Cook |
| 2015-08-02 | Work around FIRRTL initialization pedantry | Andrew Waterman |
| 2015-08-02 | Work around FIRRTL accessor problem | Andrew Waterman |
| 2015-08-02 | Use flatMap instead of map/reduce | Andrew Waterman |
| 2015-08-01 | Compute node directions correctly | Andrew Waterman |
| 2015-08-01 | When reflecting, sort fields for determinism | Andrew Waterman |
| 2015-08-01 | Clean up flip/asInput/asOutput | Andrew Waterman |
| 2015-07-31 | Disallow dynamic bit range extraction | Andrew Waterman |
| 2015-07-31 | Improve handling of := and <> | Andrew Waterman |
| 2015-07-31 | Implement getWidth more completely and less buggily | Andrew Waterman |
| 2015-07-31 | Open heart surgery on IDs/naming | Andrew Waterman |
| 2015-07-30 | Work around FIRRTL literal restrictions | Andrew Waterman |
| 2015-07-30 | Better literal checking | Andrew Waterman |
| 2015-07-30 | Check for negative UInt literals | Andrew Waterman |
| 2015-07-30 | Correct implementation of andR | Andrew Waterman |
| 2015-07-30 | Make Vec.fill(n)(x) the same as Vec(x, n) | Andrew Waterman |
| 2015-07-30 | Emit clocks and resets | Andrew Waterman |
| 2015-07-30 | Add missing Wire() | Andrew Waterman |
| 2015-07-30 | Move towards compatibility with FIRRTL 0.1.3 | Andrew Waterman |
| 2015-07-29 | Remove most operators from Bits | Andrew Waterman |
| 2015-07-29 | For Mux1H, use UInt instead of Bits | Andrew Waterman |
| 2015-07-29 | Remove nondeterminism in field naming | Andrew Waterman |
| 2015-07-29 | Add SInt-by-UInt multiplication operator | Andrew Waterman |
| 2015-07-29 | Add newline at end of .fir file | Andrew Waterman |
| 2015-07-29 | Print out basic status information when elaborating | Andrew Waterman |
| 2015-07-29 | Fix Bundle port ordering | Andrew Waterman |
| 2015-07-29 | Use Seq, not Iterable, when traversal order matters | Andrew Waterman |