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AgeCommit message (Expand)Author
2016-09-02Rename implicit compileOptions to defaultCompileOptions.Jim Lawson
2016-09-01Move connection implicits from Module constructor to connection methods.Jim Lawson
2016-08-30Merge branch 'master' into gsdtJim Lawson
2016-08-30Make compileOptions in the Chisel package effective.Jim Lawson
2016-08-30Explicitly clone the target type in noenq() to avoid "already bound" errors f...Jim Lawson
2016-08-30Allow compileOptions as optional arguments to elaborate() and emit().Jim Lawson
2016-08-30Correct parameter name (topModule) in ScalaDoc.Jim Lawson
2016-08-29Check module-specific compile options.Jim Lawson
2016-08-29Rename CompileOptions implicit objects.Jim Lawson
2016-08-29Pass compileOptions as an implicit Module parameter.Jim Lawson
2016-08-25fix a bug in setModNameDonggyu Kim
2016-08-22Purely cosmetic changes to placate the scalastyle checker.Jim Lawson
2016-08-22Fix firrtlDirection for class DeqIO.Jim Lawson
2016-08-21provides signal name methods for firrtl annotation and chisel testersDonggyu Kim
2016-08-18Merge branch 'sdtwigg_connectwrap_renamechisel3' into gsdt_testsJim Lawson
2016-08-17Reduce rocket-chip elaboration errors.Jim Lawson
2016-08-16Merge branch 'master' into sdtwigg_connectwrap_renamechisel3Jim Lawson
2016-08-15Make "def width" a private API; expose isWidthKnown instead (#257)Andrew Waterman
2016-08-11Merge branch 'master' into sdtwigg_connectwrap_renamechisel3Jim Lawson
2016-08-09Support Module name overrides with "override def desiredName"Andrew Waterman
2016-08-09counter(inc,n) example should reflect actual use (#252)Colin Schmidt
2016-08-03Merge branch 'master' into sdtwigg_connectwrap_renamechisel3Jim Lawson
2016-08-03Merge "package" code into "compatibility".Jim Lawson
2016-07-31Remove deprecated FileSystemUtilitiesAndrew Waterman
2016-07-31Fix two deprecation warningsAndrew Waterman
2016-07-28Add missing Decoupled object pointer.Jim Lawson
2016-07-27More compatibility fixesJim Lawson
2016-07-27Correct EnqIO/DeqIO Flipped-ness.Jim Lawson
2016-07-27Additional compatibility code.Jim Lawson
2016-07-27Correct EnqIO/DeqIO Flipped-ness.Jim Lawson
2016-07-27Correct EnqIO/DeqIO Flipped-ness.Jim Lawson
2016-07-26Add ValidIO definition for old code.Jim Lawson
2016-07-25Minimize differences with master.Jim Lawson
2016-07-25Merge branch 'master' into sdtwigg_connectwrap_renamechisel3Jim Lawson
2016-07-25Use more idiomatic ScalaTest exception expecting code.Jim Lawson
2016-07-25Add missing compatibility.scala.Jim Lawson
2016-07-21Introduce chiselCloneType to distinguish from cloneType.Jim Lawson
2016-07-20More literal/width rangling.Jim Lawson
2016-07-20Distinguish between ?Int.Lit and ?Int.widthJim Lawson
2016-07-20Compile ok.Jim Lawson
2016-07-19Incorporate connection logic.Jim Lawson
2016-07-19Merge branch 'sdtwigg_rebase_renamechisel3' into sdtwigg_wrap_renamechisel3Jim Lawson
2016-07-18Update Chisel -> chisel3 references.Jim Lawson
2016-07-18Rename "Chisel" to "chisel3" (only git mv).Jim Lawson
2016-07-11bitpat should keep the width of uint (#232)Donggyu
2016-07-07Improve QoR for Log2Andrew Waterman
2016-07-07Improve Fill code generationAndrew Waterman
2016-07-07Correct erroneous Log2 documentationAndrew Waterman
2016-07-07Avoid needlessly creating VecsAndrew Waterman
2016-06-28Merge branch 'master' into renamechisel3Jim Lawson
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