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2017-03-17Add single arg constructor back to compatibility reg (#553)Richard Lin
2017-03-08Deprecate old Reg with nulls constructor (#455)Richard Lin
2017-03-08Move log2Up and log2Down to compatibility wrapperAndrew Waterman
2017-03-08Improve UIntToOH behavior on incorrect inputs; avoid log2UpAndrew Waterman
The old implementation failed to check for width <= -2, and did the wrong thing when -1 was explicitly passed. Splitting into two methods avoids the latter issue. log2Ceil's argument might be 1, so employ a max operator.
2017-03-08In OHToUInt, use log2Ceil instead of log2UpAndrew Waterman
Since the argument is at least 2, this change has no semantic effect.
2017-03-08Use zero-width wire for 1-entry enumAndrew Waterman
2017-03-08In Counter, use log2Ceil instead of log2UpAndrew Waterman
Since the argument is at least 2, this change has no semantic effect.
2017-03-08Fix the widths of QueueIO.count and ArbiterIO.chosen for entries=0Andrew Waterman
Both should be zero-width wires.
2017-03-08Improve Reverse's exception behavior; avoid log2UpAndrew Waterman
Provide a better error message when length < 0. Change log2Up in log2Ceil, which has no effect, since the argument is always at least 2.
2017-03-08Correct Fill's exception behavior; avoid log2UpAndrew Waterman
It always should throw an exception when n < 0, but in the specific case of x.isWidthKnown && x.getWidth == 1, it failed to do so. This commit also changes log2Up in log2Ceil, which has no effect, since the argument is always at least 2.
2017-02-16Add support for clock and reset scoping (#509)Jack Koenig
withClockAndReset, withReset, and withClock allow changing the implicit clock and reset. Module.clock and Module.reset provide access to the current implicit clock and reset.
2017-02-08Add Analog typeJack Koenig
Used for stitching Verilog inout through Chisel Modules (from BlackBox to BlackBox)
2017-02-07Name all the thingsducky
2017-02-07Rename SeqMem to SyncReadMem. (#490)Jim Lawson
Retain un-deprecated SeqMem in compatibility mode, deprecate in chisel3.
2017-02-01Move backend compilation utilities (#400)Jim Lawson
* Move copyResourceToFile() to BackendCompilationUtilities. * Move BackendCompilationUtilities into a firrtl util package. Some of this could be moved into a more general tools package, but since chisel3 already has a dependency on firrtl ... * Push util down into firrtl so as not to conflict with scala.util. * Use new createTestDirectory. Fixes #452.
2017-01-31Fix spelling of ChiselExecutionSuccessJack
2017-01-31Move blackbox verilog implementations within reach of verilator (#453)Chick Markley
* Move blackbox verilog implementations within reach of verilator Blackbox implementers can annotate the modules with information on where to get the source verilog This API is very lightweight, real work is done in firrtl in companion PR Added some verilog to BlackBoxTest.v resource for testing * if a file named black_box_verilog_files.f exists add a -f black_box_verilog_files.f to the verilog to cpp command
2017-01-30Add shift register with reset (#439)Stevo
* [stevo]: add reset initialization to shift register * [stevo]: better comment * [stevo]: add tests, fix bug
2017-01-27Deprecate firrtlToVerilog in favor of compileFirrtlToVerilog (#367)Jack Koenig
Resolves #357 Also remove uses of firrtlToVerilog within chisel3. Invoking Firrtl programmatically is preferred to on the command line. Update README to indicate that Firrtl need not be installed.
2017-01-27Make uselessly public fields in utils privatejackkoenig
2017-01-27Provide package-level text to reduce ScalaDoc white space. (#432)Jim Lawson
2017-01-26doesn't lose old firrtl options annotations + transforms (#458)Angie Wang
Fixing a bug in passing down execution options to firrtl
2017-01-25Better name propagation by macros (#327)Richard Lin
* Name propagation * chiselName everywhere at best-effort level * Better collision handling * Allow recursing into inner anonymous functions * Add for loop and anonymous inner function tests
2017-01-20Add Record as new superclass of Bundle (#366)Jack Koenig
Record gives uses the power to create collections of heterogenous elements. Bundle is a special case of Record that uses reflection to populate the elements of the collection. Bundle also attempts to implement cloneType whereas users of Record are required to supply one.
2017-01-20Mark Annotation and FixedPoint as experimental (#444)Chick Markley
* Mark Annotation and FixedPoint as experimental Fix tests and other references to these constructs * Made experimental imports more specific where possible
2017-01-11Merge branch 'master' into fixedPointFromBitsAdam Izraelevitz
2017-01-10Make stop() immediately end simulation for Verilator tests (#434)Jack Koenig
2016-12-15Merge branch 'master' into fixedPointFromBitsgrebe
2016-12-14Final steps for annotations getting from chisel to firrtl (#405)Chick Markley
Pass transforms along with Annotations when calling firrtl compiler This introduces new requirement that firrtl.Transform subclasses (that are associated with an annotation) do not have parameters in their default constructor Add new test for NoDedup annotation that shows how to annotate a module instance
2016-12-14Change noenq in ReadyValid to use an uninitialized Wire instead of zero (#364)Jack Koenig
2016-12-13CheckpointPaul Rigge
2016-12-07Support for creating chisel annotations that are consumed by firrtl (#393)Chick Markley
* Support for creating chisel annotations that are consumed by firrtl Update annotation serialization in Driver Add DiamondAnnotation Spec that illustrates how to do simple annotations frontEnd must have dependency on firrtl Add annotation method to Module Circuit has extra optional parameter that is Seq of Annotations In Builder add annotation buffer to DynamicContext to store annotations created in modules Added explicit types on naming api methods to avoid type confusion Because some names are not available until elaboration create intermediate ChiselAnnotation that gets turned into a firrtl Annotation after elaboration In execute pass firrtl text and annotation to firrtl are now passed in through optionManager, though intermediate file .fir and .anno files are still created for inspection and/or later use * Somehow missed ChiselAnnotation * fixes for Jack's review of PR
2016-12-06utils scaladoc examples for BitPat through CircuitMath (#398)Richard Lin
Add examples for utils, move examples from individual apply methods to class overview scaladoc
2016-11-29Add feature warnings to build, fix feature warnings, fix some documentation ↵Richard Lin
(#387)
2016-11-23Simplify Enum API (#385)Richard Lin
Get rid of some cruft exposed in #373 This also allows Bits.fromtInt(...) to be removed. Yay! All old APIs (with some new restrictions, rocket still works fine) are preserved without deprecation in Chisel._, aside from the non-compile-time-checkable Map[] enum constructor which probably should have been deprecated during chisel2. The Map[] enums have been removed from chisel3._ without deprecation. The new restriction is that nodeType (legacy API) may only be of UInt type with unspecified width. Note that Bits() creates a UInt, and if you can't control the enum values, it makes little sense to specify a bitwidth.
2016-11-21Remove deduplication from Chisel (#347)Donggyu
Remove modName from Module
2016-11-21Deboilerplate the implicit conversions, add support for long.Uducky
2016-11-21Fix Log2ducky
2016-11-21Fix regex exampleducky
2016-11-21Stop confusing scaladocducky
2016-11-21better styleducky
2016-11-21Restyle UInt->BitPatComparableducky
2016-11-21Refactor some codeducky
2016-11-21All remaining automatable regex re-stylesducky
2016-11-21Restyle a lot of test code, mainly with regexducky
2016-11-21Restyle Bool constructors, move compatibility deprecations into ↵ducky
compatibility package object
2016-11-21SInt conversion finished, everything builds againducky
2016-11-21Refactor SInt WIPducky
2016-11-21Deprecate things, split more thingsducky
2016-11-21Break out deprecated literal constructors, refactor all the things!ducky